1. PCI/PCIe TFP Hardware
1.5.1. General
The byte-wide dual-port RAM (DPRAM) interface provides a communications pathway between the
user and the Time & Frequency Processor (TFP) micro-controller (MPU). The RAM size is 2Kx8. The
ACK register is used in conjunction with the DPRAM to avoid data contention when a memory loca-
tion is accessed simultaneously from both sides of the DPRAM. Four areas within the DPRAM are
available to the user:
Input Area
This area is used for sending commands to the TFP to set the timing mode, time code format, etc.
This area is also used to send data packets to the optional GPS receiver.
Output Area
This area holds data that the user requests from the TFP.
GPS Area
This area holds packets of data from the optional GPS receiver such as position, velocity, GPS
status, etc.
Year Area
This area holds the year number derived from the timing source (if available). The year value is
restored after a power cycle.
DPRAM Address and Contents
Data
Size
Offset
Year Area
2 bytes
0x00
GPS Area
0x80 bytes
0x02
Output Area
0x80 bytes
0x82
Input Area
0x80 bytes
0x102
1.5.2. ACK Register
This register is used to prevent dual-port RAM data contention when the same address on both sides
of a dual-port RAM is accessed simultaneously. Only three bits in this register are used, and each bit
operates independently. The function of each bit in this register is described below.
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