Chapter 2: Installation
2-13
Chassis Intrusion
A Chassis Intrusion header is lo-
cated at JL1. Attach the appropri-
ate cable to inform you of a chas-
sis intrusion.
Pin# Definition
1 +5V
2 P0-
3 P0+
4 Ground
Pin
Number
2
4
6
8
10
Definition
+5V
PO-
PO+
Ground
Ground
Pin
Number
1
3
5
7
Definition
+5V
PO-
PO+
Ground
USB Pin Definition
USB 2/3 (Front Panel USB)
USB O/1 (Back Panel USB)
Universal Serial Bus (USB)
There are two Universal Serial
Bus ports(USB 0/1) located on
the I/O panel and additional two
USB ports(USB 2/3) next to the
IDE2 on the motherboard. These
two FP USB ports can be used to
provide front side chassis access
( c a b l e s n o t i n c l u d e d ) . S e e t h e
tables on the right for pin defini-
tions.
Pin
Number
1
2
Definition
Intrusion Input
Ground
Chassis Intrusion
Pin Definitions
KB/
Mouse
DIMM 3A
DIMM 3B
DIMM 2A
DIMM 2B
DIMM 1A
DIMM 1B
Tumwater
(North Bridge)
Marvell
IDE #1
IDE #2
U
S
B
0/1
COM2
COM1
8-pin
P W 2
ATX PWR
JPF
Force
PW-On
Mic
J 2 6
Audio
Enable
S
I/O
PCI-E (x16)
PCI-X (66 MHz)
PCI-X (66 MHz)
Battery
W O R
JPS1
F
AN1
LAN1
Aux in
CDin
PCI (33MHz)
J 1 3 J 1 5
JPL1
Floppy
PW LED/KL
SA
TA
2
Chassis
Intrusion
Hance
Rapids
USB2/3
JF1
JBT1
J W D
J 6
Dn:Line_In
Up:Line_Out
J 4 1
J3
5
JS
L
E
D
S
A
T
A
L
E
D
S
A
T
A
I
2
C
(*
X
6
D
A
L
-X
T
G
)
Watch
D o g
LAN1 Enable
Fan5
Fan6
JWOL
J F 2 Spkr
CL CMOS
Fan4
FP Ctlr
Fan3
Fan2
CPU2
CPU1
SMB data toPCIEn.
SMBCLKtoPCI En.
CN1
AlMRset
J 2 7
J 7
P W
Fault
SMB PW
J 2
J 4
J 5
PCI (33MHz)
J 3
P W 1
PW3
J 4 3
LAN
CTRL
BIOS
Printer
Spkr
SA
TA
0
SA
TA
3
SA
TA
1
JL1
SATA
CTRL
Marvell SATA
Enable
H-SA
T
A
0
H-SA
T
A
1
JS0
JS1
DS1
DS3
DS6
DS2
DS5
DS7
DS8
DS9
Chassis Intrusion
USB 2/3
USB 0/1
Содержание X6DAL-XTG
Страница 1: ...X6DAL XTG USER S MANUAL Revision 1 0 SUPER...
Страница 9: ...Chapter 1 Introduction 1 3 Introduction Figure 1 1 SUPER X6DAL XTG Image...
Страница 84: ...B 8 X6DAL XTG User s Manual Notes...
Страница 106: ...C 22 X6DAL XTG User s Manual Notes...
Страница 126: ...D 20 X6DAL XTG User s Manual Notes...