Chapter 5: Advanced Serverboard Setup
5-11
Figure 5-5. X10DRL-i Layout
Notes:
Jumpers not indicated are for test purposes only. A square contact pad
indicates the location of pin 1.
5-7 Serverboard Details
X10DRL-i Quick Reference Table
LED
Description
State
Status
LE1
Rear UID LED
Blue: On
Unit Identified
LE2
Onboard PWR LED
On
System Power On
LEDM1
BMC Heartbeat LED
Green: Blinking
BMC Normal
LE6
JBT1
BIOS
LICENSE
JPI2C1 J2
4
JPWR
2
JF
1
JD1
JL1
JSD1
BT1
JTPM
1
JPL1
JPL2
JPG1
JPB1
JWD1
JI2C
2
JPME
2
JI2C
1
JPF1
JPF2
J2
3
SP1
JUIDB1
LE
2
LE
1
LEDM1
FA
NB
FA
N4
FA
N3
FA
N1
FA
N5
FA
N6
FA
NA
MAC CODE
BAR CODE
(3.0)
USB12/13
USB2/3
USB4
USB0/1
JSTBY1
JIPMB1
S-SATA2
S-SATA0
COM2
S-SATA1
S-SATA3
I-SA
TA5
PCH SLOT1 PCI-E 2.
0
X4(IN X8
)
I-S
AT
A4
CPU1 SLOT2 PCI-E 3.0 X8
I-SATA3
I-SATA2
I-SATA1
CPU1 SLOT3 PCI-E 3.0 X8
I-SATA0
CPU2 SLOT4 PCI-E 3.0 X4 (IN X8
)
CPU1 SLOT5 PCI-E 3.0 X1
6
CPU1 SLOT6 PCI-E 3.0 X8
UID
P2-DIMME
1
P1-DIMMC
1
P2-DIMMF
1
P1-DIMMD
1
P2-DIMMH
1
P1-DIMMB
1
VGA
P1-DIMMA
1
CPU1
LAN2
P2-DIMMG
1
CPU2
LAN1
IPMI_LAN
COM1
JPWR
1
BMC
PCH
LAN CTRL
LAN CTRL
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
USB8/9(3.0)
BIOS
I-SGPIO1
S-SGPI
O
1
J1
0
FA
N2
X10DRL-i
Rev. 1.01
I-SGPIO2
IPMI CODE
Jumper
Description
Default Setting
JBT1
Clear Onboard CMOS Battery
See Section 5-9
JI
2
C1/ JI
2
C2
SMB to PCI-E Slots
Pins 2-3 (Disabled)
JPB1
BMC Enable
Pins 1-2 (Enabled)
JPG1
VGA Enable
Pins 1-2 (Enabled)
JPL1/JPL2
GLAN1/GLAN2 Enable
Pins 1-2 (Enabled)
JPME2
ME Manufacturing Mode Select
Pins 1-2 (Normal)
JWD1
Watch Dog Timer Enable
Pins 1-2 (Reset)
Содержание SUPERSERVER 6018R-MT
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Страница 5: ...v Preface Notes ...
Страница 16: ...1 6 SUPERSERVER 6018R MT 6018R MTR User s Manual Notes ...
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Страница 48: ...4 20 SUPERSERVER 6018R MT 6018R MTR User s Manual Notes ...
Страница 123: ...Chapter 7 BIOS 7 41 Network Drive BBS Priorities Legacy Boot Order 1 UEFI Application Boot Priorities UEFI Boot Order 1 ...
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Страница 128: ...A 2 SUPERSERVER 6018R MT 6018R MTR User s Manual Notes ...