7-8
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UPER
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ERVER 5017GR-TF User's Manual
Chipset Confi guration
WARNING:
Setting the wrong values in the following sections may cause
the system to malfunction.
North Bridge Confi guration
This item displays the current IO chipset Revision.
Integrated IO Confi guration
Intel® VT-d
Select Enabled to enable Intel's Virtualization Technology support for Direct I/O
VT-d
by reporting the I/O device assignments to VMM through the DMAR ACPI
Tables. This feature offers fully-protected I/O resource-sharing across the Intel
platforms, providing the user with greater reliability, security and availability in
networking and data-sharing. The settings are
Enabled
and Disabled.
Intel® I/OAT
The Intel I/OAT (I/O Acceleration Technology) signifi cantly reduces CPU over-
head by leveraging CPU architectural improvements, freeing resources for more
other tasks. The options are Disabled and
Enabled
.
DCA Support
This feature accelerates the performance of I/O devices using Direct Cache
Access. The options are
Enabled
and Disabled.
IOU1-PCIe Port
This feature allows the user to set the PCI-Exp bus speed between IOU1 and
PCI-e port. The options are x4x4 and
x8
.
Port 1A Link Speed
This feature enables the user to select the target link speed for this slot. The
options are GEN1 ,
GEN2
, and GEN3.
IOU2 - PCIe Port
This feature allows the user to set the PCI-Exp bus speed between IOU2 and
PCIe port. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16, and
Auto
.
IOU3 - PCIe Port
This feature allows the user to set the PCI-Exp bus speed between IOU3 and
PCIe port. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16, and
Auto
.
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