Supero SuperServer 4048B-TRFT, Руководство пользователя

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SUPERSERVER 4048B-TRFT USER'S MANUAL
EV DFX (Device Function On-Hide) Feature
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are
Dis-
able
and Enable.
IIO0 Confi guration
IOU0 (II0 PCIE Port 2)
This item con fi gures the PCI-E port Bifuraction setting for a PCI-E port speci fi ed
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto
.
IOU1 (II0 PCIE Port 3)
This item con fi gures the PCI-E port Bifuraction setting for a PCI-E port speci fi ed
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto
.
PCI-E Completion Timeout
Select Enable for PCI-E Completion Timeout support for electric tuning. The
options are
Enable
and Disable.
PCI-E Completion Timeout Value
Use this item to set the PCI-E Completion Time-out value for electric tuning.
Enter a value between 260ms to 900ms.

PCI Express Port 0 (DMI)
Note
: For PCI Express Port 1A/Port 1B/Port 2A/Port 2B/Port 2C/Port 2D/
Port 3A/Port 3B/Port 3C/Port 3D, see the next section.
Use the items below to con fi gure the PCI-E settings for a PCI-E port speci fi ed
by the user.
The following items will display:
•
PCI-E Port Link Status
•
PCI-E Port Link Max
•
PCI-E Port Link Speed
Link Speed
Use this item to select the PCI-E link speed for the PCI-E port speci fi ed by the
user. The options are GEN1 (2.5 GT/s), GEN2 (5 GT/s), and
Auto
.