BIOS User's Manual
5-10
DRAM Refresh Rate
This option specifies the interval between Refresh signals to DRAM
system memory. The settings for this option are 15.6 us (micro-sec-
onds), 31.2 us, 62.4 us, 124.8 us or 249.6 us.
Memory Hole
This option specifies the location of an area of memory that cannot be
addressed on the ISA bus. The settings are Disabled, 15 MB-16 MB, or
512 KB-640 KB.
SDRAM CAS# Latency
This option regulates the column address strobe. The settings are 2
SCLKs, 3 SCLKs or Auto.
SDRAM RAS# to CAS# Delay
This option specifies the length of the delay inserted between the RAS
and CAS signals of the DRAM system memory access cycle if SDRAM is
installed. The settings are Auto (AMIBIOS automatically determines the
optimal delay), 2 SCLKs or 3 SCLKs. Note: The Optimal default
setting is Auto and the Fail-Safe default setting is 3 SCLKs.
SDRAM RAS# Precharge
This option specifies the length of the RAS precharge part of the DRAM
system memory access cycle when Synchronous DRAM system memory
is installed in the computer. The settings are Auto (AMIBIOS automatically
determines the optimal delay), 2 SCLKs or 3 SCLKs. Note: The Optimal
default setting is Auto and the Fail-Safe default setting is 3
SCLKs.
Power Down SDRAM
BX supports SDRAM power down mode to minimize SDRAM power
usage. The settings for this option are Enabled or Disabled. The
Enabled setting enables the SDRAM Power Down feature.
ACPI Control Register
The settings for this option are Enabled or Disabled. Set this option to
Enabled to enable the ACPI (Advanced Configuration and Power Inter-
face) control register.
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