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Chapter 1: Introduction
1-9
1-2 Chipset Overview: Intel E7210 (Canterwood ES)
Intel’s Intel E7210 (Canterwood ES) Chipset contains the following main
components: Canterwood Memory Controller Hub (MCH) and the I/O Control-
ler Hub (Hance Rapids 6300ESB ICH). These two components are intercon-
nected via Hub Interface.
Memory Controller Hub (MCH)
The Canterwood Memory Controller Hub (MCH) is designed to support Intel
PGA 478-pin Processors. The function of the Canterwood MCH is to arbi-
trate the flow of data transfer between system bus (FSB), system memory,
and Hub Interface. The Canterwood MCH supports 800 MHz FSB, 400/333
Memory Interface, 533 MHz FSB, 333/266 Memory Interface, and 400 MHz
FSB 266 MHz Memory Interface.
System Memory Interface
The Canterwood Memory Controller (MCH) supports two 64-bit wide DDR
data channels with bandwidth up to 6.4 GB/s (DDR400) in dual channel
mode. It supports 128-MB, 256-MB, 512-MB, 1.0 GB, x4, x8, X16 DDR.
Maximum system memory supports up to 4.0 GB for Dual-Channel. ECC or
Non ECC unbuffered DDR DIMMs are supported, but it does not support
registered, mixed-mode DIMMs. (For more information, please refer to Page
1-7).
6300ESB
(Hance Rapids) System Features
The I/O Controller Hub provides the I/O subsystem with access to the rest
of the system. It supports 2-channel Ultra ATA/100 Bus Master IDE Control-
ler, two Serial ATA (SATA) Host Controllers, SMBus 2.0 Controller, LPC/
Flash BIOS Interface, PCI 2.3 Interface, and Integrated System Management
Controller.
6300ESB
(Hance Rapids) ICH System Features
The 6300ESB (Hance Rapids) ICH system consists of:
The I/O Controller Hub (Hance Rapids ICH) provides the I/O subsystem with
access to the rest of the system. Additionally, it integrates many I/O func-
tions.
The 6300ESB (Hance Rapids) integrates: 2-channel Ultra ATA/100 Bus
Master IDE Controller, two Serial ATA (SATA) Host Controllers, SMBus 2.0
Controller, LPC/Flash BIOS Interface, PCI-X (66MHz) 1.0 Interface, PCI 2.2
Interface and System Management Controller.