Supermicro PIIISEA, Руководство пользователя

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B-1
Appendix B: AMIBIOS POST Diagnostic Error Messages
APPENDIX B
Appendix B
AMIBIOS POST Diagnostic Error
Messages
This section describes the power-on self-tests (POST) port 80 codes for
the AMIBIOS.
C h e c k
Point Description
00 Code copying to specific areas is done. Passing control
to INT 19h boot loader next.
03 NMI is Disabled. Next, checking for a soft reset or a
power-on condition.
05 The BIOS stack has been built. Next, disabling cache
memory.
06 Uncompressing the post code unit next.
07 Next, initializing the CPU init and the CPU data area.
08 The CMOS checksum calculation is done next.
0B N e x t , p e r f o r m i n g a n y r e q u i r e d i n i t i a l i z a t i o n b e f o r e
keyboard BAT command is issued.
0C The keyboard controller I/B is free. Next, issuing the
BAT command to the keyboard controller.
0E The keyboard controller BAT command result has been
verified. Next, performing any necessary initialization
after the keyboard controller BAT command test.
0F T h e i n i t i a l i z a t i o n a f t e r t h e k e y b o a r d c o n t r o l l e r B A T
command test is done. The keyboard command byte is
written next.