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Figure 38. Power supply schematic diagram
7
25
Power
MB1144
B-02
6/24/2015
Title:
Size:
Reference:
Date:
Sheet:
of
A3
Revision:
STM32L476G-EVAL
Project:
SV
1
SG
2
CV
3
CG1
4
CG2
5
CG3
6
L2
BNX002-01
C100
220uF
E5V
C131
10uF[ESR<0.2ohm]
VDD_ADJ
+5V
VDD_ADJ
TP13
1
3
2
CN22
DC-10B
Z1
SMAJ5.0A-TR
C124
100nF
1
2
3
U31
ZEN056V130A24LS
1
3
2
RV1
3386P-503H[5%]
R235
10.2K[1%]
Power Supply VDD_ADJ [1.7V to 3.61V]
R236
20K[1%]
C140
4.7uF
Vout=1.22*(1+R1/R2)
C133
100nF
VDD_MCU
VDD
BT1
CR1220 holder
L1
BEAD
3
2
1
JP2
VDD
TP5
+3V3
VDD_ADJ
C45
100nF
C42
100nF
VDD_MCU
C35
100nF
5V
TP10
+5V
R165
1K
1
2
LD7
Red
TP1
D5V
U5V_STLINK
U5V
7
8
5
6
3
4
1
2
JP17
Header 4X2
E5V
EN
1
GN
D
2
VO
4
ADJ
5
GN
D
7
VI
6
PG
3
U34
ST1L05BPUR
VDD_IO
+5V
+3V3
TP17
C116
4.7uF
R204
20.5K[1%]
R203 11.8K[1%]
C98
10uF[ESR<0.2ohm]
EN
1
GN
D
2
VO
4
ADJ
5
GN
D
7
VI
6
PG
3
U28
ST1L05BPUR
Power Supply 3.3V
Vout=1.22*(1+R1/R2)
C101
100nF
+3V3
TP11
C38
100nF
VDD_IO
VDD_IO
TP4
VDDA
3
2
1
JP10
VDDA
TP8
+3V3
VDD_USB
3
2
1
JP1
VDD_USB
TP2
+3V3
VDD
C59
1uF
C60
100nF
GND
GND
TP18
TP3
VREF+
Vin
3
Vout
2
1
Tab
4
U27
LD1117S18TR
C107
10uF
+1V8
1V8
TP16
+3V3
connected by shunt of
IDD_measurement circuitry
to use a supercapacitor:
remove the jumper, and connect positive terminal
of the supercapacitor to pin 2 of the jumper.
VDD_MCU
VDD_MCU
VDD_MCU
C36
100nF
VDD_USB
R202
[N/A]
3
2
1
JP12
JP3
Header 2X1
R206
[N/A]
R234
[N/A]
R240
[N/A]
C46
1uF
C33
1uF
C32
1uF
C50
100nF
C41
100nF
C48
100nF
C51
100nF
Recommendation:
100nF decoupling capacitor for each VDD pin
R207
124[1%]
R209
232[1%]
+5V
C99
10uF
+3V6
3V6
TP12
Vout=1.25*(1+232/124)=3.589V
C114
100nF
+
-
Vin
3
Vout
2
1
Tab
4
U26
LD1117STR
VBAT
6
VSS
16
VDD
17
VSSA
30
VREF-
31
VREF+
32
VDDA
33
VSS
38
VDD
39
VSS
71
VDD
72
VSS
107
VDD
108
VSS
143
VDD
144
VDDIO2
95
VDD
52
VDD
62
VDD
84
VDDIO2
131
VSS
120
VSS
94
VSS
51
VSS
61
VSS
83
VSS
130
VDDUSB
106
VDD
121
U7B
STM32L476ZGT6U
C43
100nF