DocID027351 Rev 3
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UM1855
Hardware layout and configuration
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Figure 18. Schematic diagram of logic part of low-power-mode IDD measurement
The measurement process consists of 3 phases:
Phase 1 - start and transiting to low-power mode
While in dynamic run mode, the MCU sets IDD_CNT_EN signal on its PF10 port low,
starting the measurement process. This makes the counters in U14 start counting the clock
pulses generated with an own RC oscillator. At about 150 ms from the start, the Q12 output
of U14 goes high, terminating the phase 1. After starting the measurement process, the
MCU transits to low-power mode. The duration of the phase 1 of about 150ms allows the
MCU enough time for transiting into low-power mode.
Phase 2 - sampling
The MCU is now in low-power mode. The phase 2 starts with the Q12 port of U14 going
high, 150 ms after the MCU, at that time in dynamic run mode, started the low-power-mode
consumption current measurement process. The transistor T2 goes in high-impedance
mode, which results in setting the analog part in high sensitivity state, needed for measuring
very low currents. The Q13 port of U14 keeps the path between ports I/O and O/I of U13
conductive. The sampling capacitor C73 is charged through the resistor R122 to the voltage
at the output of the differential analog amplifier, representing the current consumed by the
MCU in low-power mode. The duration of the phase 2 is about 150 ms. This time is needed
to allow the voltage on the sampling capacitor C73 to stabilize.
Phase 3 - exiting low-power mode, measurement and end
The MCU is in low-power mode. The voltage across C73 capacitor is now stabilized so it
represents the current consumed by the MCU in low-power mode. The phase 3 starts with
setting the U13 path between ports O/I and I/O to non-conductive state, for the voltage
across C73 to hold. The same event causes the IDD_WAKEUP signal for the MCU to
change state, to signal to the MCU that the voltage on C73 is now ready for being
measured. The MCU transits from low-power mode to dynamic run mode. The voltage on
C73 representing the current the MCU consumed when it was in low-power mode, is now
measured by the MCU, using the ADC port PA5, and stored. The Q12 port transits to low
state at the same time as the Q13 goes high. As a consequence, the analog part of the IDD
measurement circuit is back to low-sensitivity mode adapted for measuring the
microcontroller supply current in its dynamic run mode. The phase 3 and the whole
measurement process ends with the microcontroller setting the IDD_CNT_EN signal back
high.
Figure 19
illustrates the timing of the low-power-mode current consumption
measurement process.
IDD_Measurement
IDD_CNT_EN
IDD_WAKEUP
2
3
4
5
U16
SN74LVC1G04DCKT
I/O
1
O/I
2
GND
3
C
4
VCC
5
U13
SN74LVC1G66DCKT
3
4
5
G
S
D
1
2
6
T3
FDC606P
VDD
Q11
1
Q12
2
Q13
3
Q5
4
Q4
5
Q6
6
Q3
7
GND
8
Ctc
9
Rtc
10
RS
11
MR
12
Q8
13
Q7
14
Q9
15
VCC
16
U14
74LV4060PW
VDD
VDD
R127
220K
R122
10K
VDD
C77
1nF
R134
15K
R130
30K
Oscillator frequency 30KHz
VDD
C72
100nF
PC5
PF10
PA5
8
U15C
TSZ124IPT
Shunt_x1000
C7
3
1uF
R137
220K
C74
100nF
C76
100nF
