Stanford Research Systems LDC500, Руководство по эксплуатации и обслуживанию

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4.6 Status Model 4 – 57
4.6 Status Model
The LDC500 status registers follow the hierarchical IEEE–488.2 for-
status registers
mat. A block diagram of the status register array is given in Figure 4.1.
7
X
5
4
3
2
1
0
undefined
RQS / MSS: Master Summary Status
ESB: Event Status Bit
MAV: Message Available
IDLE
undefined
LDSB: LD Event Summary Bit
TESB: TEC Event Summary Bit
7
6
5
4
3
2
1
0
Status Byte
SB SRE
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 15
LDCR LDPT LDNT LDEV LDEN
LD Status
CC/CP
BW
Scanning
LD Stable
ILIM
PLIM
VLIM
Interlock
9
Range
VTRIP
OPEN
TEC Off
TMAX
TMIN
TFAULT
LD ON
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
10
11
0
1
2
3
4
5
6
7
8
9
10
11
TECR TEPT TENT TEEV TEEN
TEC Status
CT/CC
T Stable
Tuning
IMAX
IMIN
VLIM
T Fault
TMAX
TMIN
TEC Open
Runaway
TEC ON
5
4
3
2
0
5
4
3
2
0 OPC: Operation Complete
undef
DDE: Device Error
EXE: Execution Error
CME: Command Error
undef
undef
QYE: Query Error
ESR ESE
Standard Event Status
Figure 4.1: Status Model for the LDC500 Series Laser Diode Controllers.
There are five categories of registers in the status model of the con-
troller:
Condition Registers : These read-only registers correspond to the real-time condi-
tion of some underlying physical property being monitored.
Queries return the latest value of the property, and have no
further side e
ff
ects. Condition register names end with
CR
.
Transition Selection Registers : These read
/
write registers define specific transition events (0
→
1 or 1
→
0). The event is then defined by the selected transition
LDC500 Series Laser Diode Controllers