Sony WLL-CA55, Руководство по обслуживанию

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4-4
WLL-CA55
IC
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OFDM MODULATOR
—TOP VIEW—
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55
53
156 155 150 145 140 135 130 125 120 115 110 105
1 5
10 15 20 25 30 35 40 45 50 52
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
I EXT CLK27
I DATA ENABLE
D.GND
NC
A.GND
A.V
CC
O OFDM SIGNALX
O OFDM SIGNAL
A.V
CC
A.GND
IO VRO
I VREF
O COMP
NC
D.GND
CLK MASTER 18M
RST
I TCK
D.VCC
I TRST
I TDI
I TMS
O TDO
I PLL RST
I PLL A
A.GND
A.V
CC
I TS DATA7
NC
I TS DATA6
I TS DATA5
I TS DATA4
I TS DATA3
D.V
CC
I TS DATA2
I TS DATA1
I TS DATA0
GND
D.V
CC
O CLK 9M
O PREQ
O TEST OUT0
D.V
CC
O TEST OUT1
O TEST OUT2
O TEST OUT3
O TEST OUT4
O TEST OUT5
O TEST OUT6
D.GND
O TEST OUT7
O TEST OUT8
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O TEST OUT9
O TEST OUT10
O TEST OUT11
O TEST OUT12
O TEST OUT13
O TEST OUT14
O TEST OUT15
D.GND
D.V
CC
O TEST OUT16
O R OOS
O R OVERFLOW
O R EARLY PCR
O IFTSO3
O IFTSO2
O IFTSO1
O IFTSO0
O DA CLK
O DIGIT DT11
D.GND
D.V
CC
O DIGIT DT10
O DIGIT DT9
O DIGIT DT8
O DIGIT DT7
D.V
CC
D.V
CC
O DIGIT DT6
O DIGIT DT5
O DIGIT DT4
O DIGIT DT3
O DIGIT DT2
D.V
CC
D.V
CC
O DIGIT DT1
O DIGIT DT0
O TINT ADRS21
O TINT ADRS20
O TINT ADRS19
O TINT ADRS18
O TINT ADRS17
O TINT ADRS16
O TINT ADRS15
D.V
CC
D.V
CC
O TINT ADRS14
O TINT ADRS13
O TINT ADRS12
O TINT ADRS11
O TINT ADRS10
O TINT ADRS9
O TINT ADRS8
105
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O
O
—
O
O
O
O
O
O
—
I/O
I/O
I/O
I/O
—
I/O
I/O
O
—
O
O
O
O
O
O
—
—
O
O
I
I
I
I
—
I
I
I
—
I
I
I
I
—
I
I
I
I
I
I
—
I
I
O TINT ADRS7
O TINT ADRS6
D.GND
O TINT ADRS5
O TINT ADRS4
O TINT ADRS3
O TINT ADRS2
O TINT ADRS1
O TINT ADRS0
D.V
CC
IO TINT DATA5
IO TINT DATA4
IO TINT DATA3
IO TINT DATA2
D.GND
IO TINT DATA1
IO TINT DATA0
O TINT CS
D.V
CC
O TINT OE
O TINT WE
O IIC ERR
O NOE
O INTR
O NRD
D.GND
D.V
CC
O NWR
O PLL LOCK
I TEST IN24
I TEST IN23
I TEST IN22
I TEST IN21
D.V
CC
I TEST IN20
I TEST IN19
I TEST IN18
D.GND
I TEST IN17
I TEST IN16
I TEST IN15
I TEST IN14
D.V
CC
I TEST IN13
I TEST IN12
I TEST IN11
I TEST IN10
I TEST IN9
I TEST IN8
D.GND
I TEST IN7
I TEST IN6
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I
I
I
I
I
I
I/O
—
—
I/O
I
I
I
I
I
I
I
I
I
—
—
I
I
I
I
I
—
I
I
I
I
I
—
—
I
I
I
I
I
I
I
—
I
—
—
I
—
I/O
I
O
I
I
I TEST IN5
I TEST IN4
I TEST IN3
I TEST IN2
I TEST IN1
I TEST IN0
IO IIC CLK
D.GND
D.V
CC
IO IIC DATA
I IIC SLEEP
I IIC PARA MODON
I IIC CCR4
I IIC CCR3
I IIC CCR2
I IIC CCR1
I IIC CCR0
I IIC TEST
I CLK73 TEST
D.GND
D.V
CC
I EXT CLOCK EN
I OUT MUTE
I INP BUSCNT3
I INP BUSCNT2
I INP BUSCNT1
D.V
CC
I INP BUSCNT0
I OUT BUSCNT2
I OUT BUSCNT1
I OUT BUSCNT0
I CLK36 TEST
D.GND
D.V
CC
I CLK18 TEST
I EA
I IIC SLAVE A6
I IIC SLAVE A5
I IIC SLAVE A4
I IIC SLAVE A3
I IIC SLAVE A2
NC
I CLK9 TEST
D.GND
D.V
CC
I XTAL A
D.V
CC
IO XTAL EB
I XTAL C
O XTAL 18M
I IIC SLAVE A1
I IIC SLAVE A0
I
I
—
—
—
—
O
O
—
—
O
I
O
—
—
I
I
I
—
I
I
I
O
I
I
—
—
I
—
I
I
I
I
—
I
I
I
—
—
O
O
O
—
O
O
O
O
O
O
—
O
O
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
O
—
—
O
O
O
O
—
—
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
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INPUTS
CLK MASTER 18M
I CLK18 TEST
I CLK36 TEST
I CLK73 TEST
I CLK9 TEST
I DATA ENABLE
I EA
I EXT CLK27
I EXT CLOCK EN
I IIC CCR0 - I IIC CCR4
I IIC PARA MODON
I IIC SLAVE A0 - I IIC SLAVE A6
I IIC SLEEP
I IIC TEST
I INP BUSCNT0 - I INP BUSCNT3
I OUT BUSCNT0 - I OUT BUSCNT2
I OUT MUTE
I PLL A
I PLL RST
I TCK, I TDI, I TMS, I TRST
I TEST IN0 - I TEST IN24
I TS DATA0 - I TS DATA7
I VREF
I XTAL A, I XTAL C
RST
OUTPUTS
IO VRO
O CLK 9M
O COMP
O DA CLK
O DIGIT DT0 - O DIGIT DT11
O IFTSO0 - O IFTSO3
O IIC ERR
O INTR
O NOE
O NRD
O NWR
O OFDM SIGNAL,
O OFDM SIGNALX
O PLL LOCK
O PREQ
O R EARLY PCR
O R OOS
O R OVERFLOW
O TDO
O TEST OUT0 - O TEST OUT16
O TINT ADRS0 - O TINT ADRS21
O TINT CS
O TINT OE
O TINT WE
O XTAL 18M
INPUTS/OUTPUTS
IO IIC CLK
IO IIC DATA
IO TINT DATA0 - IO TINT DATA5
IO XTAL EB
: MASTER CLOCK FOR PLL (18.28 MHz)
: EXTERNAL CLOCK (18 MHz)
: EXTERNAL CLOCK (36 MHz)
: EXTERNAL CLOCK (73 MHz)
: EXTERNAL CLOCK (9 MHz)
: DATA ENABLE
: INPUT BUFFER POWER CONTROL
: EXTERNAL CLOCK
: EXTERNAL CLOCK ENABLE
: IIC CLOCK RATE CONTROL
: IIC PARALLEL WRITE/READ MODE
: IIC CONTROLLED ADDRESS
: IIC SLEEP
: IIC TEST MODE
: TEST INPUT CONTROL
: TEST OUTPUT CONTROL
: OUTPUT MUTING CONTROL
: PLL THROUGH CLOCK
: PLL RESET
: TEST
: TEST DATA
: TS DATA
: REFERENCE VOLTAGE (1.1 V)
: CRYSTAL OSCILLATOR
: POWER ON RESET
: CONNECTION OF RESISTANCE
: CLOCK (9 MHz)
: TEST
: CLOCK FOR EXTERNAL D/A CONVERTER (36 MHz)
: DIGITAL DATA
: INVERSE FAST FOURIER TRANSFORM
: IIC ERROR
: IIC INTERRUPT
: IIC VALID
: IIC READ
: IIC WRITE
: ANALOG OFDM SIGNAL
: PLL LOCK SIGNAL
: PACKET REQUEST
: PROGRAM CLOCK REFERENCE DEJITTER OVERFLOW
: TS DATA OUT OF SYNC
: FIFO OVERFLOW
: TEST
: TEST DATA
: SRAM ADDRESS
: SRAM CHIP SELECT
: SRAM OUTPUT ENABLE
: SRAM WRITE ENABLE
: CRYSTAL OSCILLATOR (18 MHz)
: IIC SERIAL CLOCK
: IIC SERIAL DATA
: SRAM DATA
: CRYSTAL OSCILLATOR
CXD9152R (SONY)