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65
HCD-CP500K/CP500MD
Pin No.
48
49
50, 51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
I/O
I/O
I/O
I/O
I (S)
O
I (A)
—
I (A)
I (A)
—
O (3)
I (A)
O (A)
I (A)
I (A)
I (A)
I (A)
I (A)
I (A)
I (A)
O (A)
—
I (A)
I (A)
—
I (A)
I (A)
I (A)
I (A)
I (S)
O
O
O
O
O
O
O
Pin Name
D1
D0
D2, D3
MVCI
ASYO
ASYI
AVDD
BIAS
RFI
AVSS
PCO
FILI
FILO
CLTV
PEAK
BOTM
ABCD
FE
AUX1
VC
ADIO
AVDD
ADRT
ADRB
AVSS
SE
TE
DCHG
APC
ADFG
F0CNT
XLRF
CKRF
DTRF
APCREF
TEST0
TRDR
Description
Data input/output for DRAM
Clock input from an external VCO (Fixed at “L”)
Playback EFM duplex signal output
Playback EFM comparator slice level input
+3V power supply (Analog)
Playback EFM comparator bias current input
Playback EFM RF signal input
Ground (Analog)
Phase comparison output for the recording/playback EFM master PLL
Filter input for the recording/playback EFM master PLL
Filter output for the recording/playback EFM master PLL
Internal VCO control voltage input for the recording/playback EFM master PLL
Light amount signal peak hold input from the CXA2523AR
Light amount signal bottom hold input from the CXA2523AR
Light amount signal input from the CXA2523AR
Focus error signal input from the CXA2523AR
Auxiliary A/D input
Middle point voltage (+1.5V) input from the CXA2523AR
Monitor output of the A/D converter input signal (Not used)
+3V power supply (Analog)
A/D converter operational range upper limit voltage input (Fixed at “H”)
A/D converter operational range lower limit voltage input (Fixed at “L”)
Ground (Analog)
Sled error signal input from the CXA2523AR
Tracking error signal input from the CXA2523AR
Connected to +3V power supply
Error signal input for the laser digital APC (Fixed at “L”)
ADIP duplex FM signal input from the CXA2523AR (22.05
±
1 kHz)
Filter f0 control output to the CXA2523AR
Control latch output to the CXA2523AR
Control clock output to the CXA2523AR
Control data output to the CXA2523AR
Reference PWM output for the laser APC
PWM output for the laser digital APC (Not used)
Tracking servo drive PWM output (–)
• Abbreviation
EFM: Eight to Fourteen Modulation
PLL : Phase Locked Loop
VCO: Voltage Controlled Oscillator
Содержание HCD-CP500K
Страница 7: ...7 HCD CP500K CP500MD SERVICE POSITION OF THE TAPE MECHANISM DECK Tape mechanism deck CN301 CN303 ...
Страница 39: ...39 HCD CP500K CP500MD MEMO ...
Страница 47: ...HCD CP500K CP500MD 47 47 7 4 SCHEMATIC DIAGRAM CD BOARD Page 52 ...
Страница 49: ...HCD CP500K CP500MD 49 49 7 6 SCHEMATIC DIAGRAM BD BOARD 1 2 Page 50 Page 50 Page 50 ...
Страница 50: ...HCD CP500K CP500MD 50 50 7 7 SCHEMATIC DIAGRAM BD BOARD 2 2 Page 49 Page 49 Page 49 Page 57 Page 57 ...
Страница 55: ...HCD CP500K CP500MD 55 55 7 12 SCHEMATIC DIAGRAM TC BOARD IC B D Page 52 ...
Страница 57: ...HCD CP500K CP500MD 57 57 7 14 SCHEMATIC DIAGRAM DIGITAL BOARD IC B D IC B D IC B D Page 50 Page 50 Page 52 ...
Страница 59: ...HCD CP500K CP500MD 59 59 7 16 SCHEMATIC DIAGRAM CONTROL SECTION Page 53 Page 52 Page 52 ...
Страница 93: ...93 HCD CP500K CP500MD MEMO ...