Sony BKDS-PA3291, Руководство по обслуживанию

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6-8
BVS-A3232/V3232
IC
1
2
3
4
5
6
7
8
9
STD.P
CS0
ALE
A0
A1
A2
A3
RD
18
17
16
15
14
13
12
11
10
GND
V
DD
(+5V)
(V
DD
)
(V
DD
)
CS1
D0
D1
D2
D3
WR
INPUT
A0–A3
ALE
CS1,CS0
RD
WR
INPUT/OUTPUT
D0–D3
OUTPUT
STD.P
; ADDRESS BUS IN
; ADDRESS LATCH ENABLE IN
; CHIP SELECT IN
; READ IN
; WRITE IN
; DATA BUS IN/OUT
; STANDARD PULSE OUT
4
5
6
7
14
13
12
11
8
10
2
15
3
A0
A1
A2
A3
D0
D1
D2
D3
RD
WR
CS0
CS1
ALE
1
STD.P
–TOP VIEW–
C-MOS REAL TIME CLOCK WITH CRYSTAL OSCILLATOR
MSM62X42BRS-A (OKI)
CLOCK
HOLD
OSC
32.768KHz
GATE
CARRY
GATE
ALE
LATE & LATCH DECODER
COUNTER
CONTROL
SECONDS MINUTES HOURS DAYS YEARS
WEEKS
MONTHS
REGISTER
D E F HOLD
BIT
1Hz
BUSY
BIT
RESET
BIT
10
2
7
6
5
4
8
STOP
BIT
30SEC
BIT
ADJ
BIT
WR
RD
CS0
A3
A2
A1
A0
64Hz
S1
CD CE CF
S10
30 SEC
ADJ BIT
24/12
BIT
MI1
MI10
H1
H10
W
D1
D10 MO1
MO10
Y1
Y10
SECOND CARRY
MINUTE CARRY
HOUR CARRY
S1~
CF
3
ALE
15
CS1
D3
D2
D1
D0
STD.P
11
12
13
14
1
1
2
3
4
8
7
6
5
V
EE
(-3 to -20V)
V
CC
(+3 to +20V)
–TOP VIEW–
LOW NOISE OPERATIONAL AMPLIFIER
– +
– +
NE5532P (TI)
DUAL OPERATIONAL AMPLIFIER
— TOP VIEW —
V
DD
(+15 V)
8 7 6 5
1 2 3 4
+
–
V
EE
(–15 V)
+
–
NJM4560D-D (JRC)
1
2
3
4
5
6
7
8
9
10
CK
IN
IN 1
IN 2
IN 3
IN 4
IN 5
IN 6
IN7
IN 8
20
19
18
17
16
15
14
13
12
11
AND
LOGIC
ARRAY
MACRO CELL
GND
* ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.
V
DD
(+5V)
I/O 8
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
I/O 2
I/O 1
IN 9
–TOP VIEW–
C-MOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC DEVICE
GND
2
3
4
5
6
7
8
9
11
IN
1
10
I/O
19
20
CK
V
DD
(+5V)
CK
18
17
16
15
14
13
12
PEEL18CV8P-25 (ICT)
PEEL18CV8PC-25
C-MOS QUAD 2-INPUT NAND GATES
—TOP VIEW—
A
B
A
B
Y = Y
14 13
V
DD
GND
12 11 10 9 8
7 6 5 4 3 2 1
A
0
0
1
1
B
0
1
0
1
TYPE
TC74AC00 TYPE
TC74VHC00
MC74HCT00N
74ACT00 TYPE
OTHER TYPES
V
DD
+2 to +5.5V
+5V
Y
1
1
1
0
0 ; LOW LEVEL
1 ; HIGH LEVEL
NOTE:
Y = A • B = A + B
+4.5 to +5.5V
+2 to +6V
SN74HC00ANS (TI)FLAT PACKAGE
SN74HC00ANS-E05