6. Programming the Volatile Memory
The volatile memory can be programmed to set up the various functions necessary to realize a PLL function, a clock output to clock
input relationship and can be used to monitor input clock that controls the PLL. The front-page block diagram is repeated here to
refresh the various limits and possibilities that are necessary for the calculations below.
÷ P
PFD
LF
÷M
n
/M
d
÷R
÷R
÷R
÷R
÷R
÷R
VDD_XTAL
VDDA
VDDOA
VDDOB
VDDOC
VDDOD
VDDOE
XA/CLKIN_1
XB
CLKIN_2
nCLKIN_2
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
÷N
0b
÷N
0a
÷N
1b
÷N
1a
÷O
0b
÷O
0a
÷O
1b
÷O
1a
÷O
2b
÷O
2a
÷O
3b
÷O
3a
÷O
4b
÷O
4a
Figure 6.1. Top Level Block Diagram
Si5357 Reference Manual • Programming the Volatile Memory
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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Rev. 0.2 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 26, 2021
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