Register field name
Address Base
Bit
length
R/W/RW
Description
Device
mode
OMUX10_11_SEL1
2A
4
3
RW
Selects output mux clock for output
clocks OUT10, OUT11: 0 = HSDIV0 1
= HSDIV1 2 = HSDIV2 3 = HSDIV3 4
= HSDIV4 5 = ID0 6 = ID1 7 = Clock
from OMUX10_11_SEL0 Note that the
OMUX10_11_SEL1 value is forced to 7
whenever the PLL is disabled
READY/
ACTIVE
HSDIV0A_DIV
2B
0
8
RW
O0 divider value for bank A
READY
if divider
is cur-
rently
driving
the out-
put else
READY/
ACTIVE
HSDIV0B_DIV
2C
0
8
RW
O0 divider value for bank B
HSDIV1A_DIV
2D
0
8
RW
O1 divider value for bank A
HSDIV1B_DIV
2E
0
8
RW
O1 divider value for bank B
HSDIV2A_DIV
2F
0
8
RW
O2 divider value for bank A
HSDIV2B_DIV
30
0
8
RW
O2 divider value for bank B
HSDIV3A_DIV
31
0
8
RW
O3 divider value for bank A
HSDIV3B_DIV
32
0
8
RW
O3 divider value for bank B
HSDIV4A_DIV
33
0
8
RW
O4 divider value for bank A
HSDIV4B_DIV
34
0
8
RW
O4 divider value for bank B
HSDIV3_DIV_SEL
35
3
1
RW
Selects bank A (0) or bank B (1) 03 divid-
er settings. Same description applies as
for HSDIV0_DIV_SEL.
READY/
ACTIVE
ID0_CFG_SEL
35
6
1
RW
N0 configuration bank select. The divider
supports dynamically switching between
two complete configurations controlled by
this bit. Reconfiguration should be done
on the unselected bank. If ID0_CFG=0,
running based off bank A, then bank
B may be freely reconfigured and once
ready all changes will be applied to the
ID once ID0_CFG=1 thus changing the
ID from bank A to bank B. Spread spec-
trum enable fields ID0A_SS_ENA and
ID0B_SS_ENA are the only exception and
may be enabled/disabled while bank is se-
lected. 0 = bank A 1 = bank B
READY/
ACTIVE
HSDIV4_DIV_SEL
35
4
1
RW
Selects bank A (0) or bank B (1) O4 divid-
er settings. Same description applies as
for HSDIV0_DIV_SEL.
READY/
ACTIVE
ID1_CFG_SEL
35
7
1
RW
N1 configuration bank select. Same de-
scription related to ID1 applies as in the
ID0_CFG description. 0 = bank A 1 =
bank B
READY/
ACTIVE
HSDIV2_DIV_SEL
35
2
1
RW
Selects bank A (0) or bank B (1) O2 divid-
er settings. Same description applies as
for HSDIV0_DIV_SEL.
READY/
ACTIVE
HSDIV0_DIV_SEL
35
0
1
RW
Selects bank A or bank B divider O0 set-
tings. The O0 supports dynamic integer
divider changes through this divider select
control bit. 0 = bank A divider 1 = bank B
divider
READY/
ACTIVE
Si5357 Reference Manual • Register Map
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
27
Rev. 0.2 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 26, 2021
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