3. 2.4 GHz RF Matching Design Steps
2.4 GHz RF matching design for EFR32 chips consists of the following steps:
1. Determine the optimum termination impedance for the PA.
2. Choose the RF matching topology.
3. Create the initial design with ideal, loss-free elements. This ideal design can be used as a starting point for a design with parasitics.
4. Design with parasitics and losses. At 2.4 GHz, the parasitics of the SMD elements and the pcb have a major effect, so tuning/
optimization of the design is required. Here an optional EM simulation can be done, but simulations with well-estimated pcb parasit-
ics and SMD equivalent models usually give adequate results.
5. Conduct bench testing and tuning.
3.1 Determining the Optimum Termination Impedance for the PA
The first step of the matching design procedure is to determine the optimum termination impedance at the PA. The realized matching
network should present this impedance for the PA at the 2G4RF_IOP pin if 50 Ω termination is applied at the antenna port.
The 2G4RF_IOP RF port termination determines the major RF parameters, such as the delivered PA power and harmonic content in
TX mode or the sensitivity in RX mode. As part of the design process, the goal is to deliver maximum power to a 50 Ω output termina-
tion (e.g., to a 50 Ω antenna) in TX mode. In addition, proper harmonic suppression and good RX sensitivity in reception mode are
required.
The optimum termination impedance for delivering maximum power in TX mode is determined by load-pull testing. A good termination
impedance compromise for all EFR variants and for all power levels is Zload_opt = ~23+j11.5 Ω. Refer to
Appendix 1. PA Optimum
Impedance Determination
for more details. This termination impedance has to be shown by the matching network at the PA side if its
antenna output is terminated with a 50 Ω load.
The proper impedance at the single-ended output pin (2G4RF_IOP) also depends on the grounding of the other (2G4RF_ION) TX pin.
To keep its effect negligible, this pin should be massively connected ("back-routed") to the next ground layer beneath it by multiple vias,
as shown by the blue dashed ellipse in the figure below. More detailed information about proper layout design can be found in
AN928:
EFR32 Layout Design Guide
.
Figure 3.1. Element Match PCB Layout with Good 2G4RF_ION Grounding
AN930: EFR32 2.4 GHz Matching Guide
2.4 GHz RF Matching Design Steps
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