Appendix 4.2 Bench Measurements and Tuning
The impedance at the TX pin and the transfer characteristic are measured in the same way as the pure lumped element ladder match-
es. See
3.5 Bench Tuning and Measured Results
. Unfortunately, the EM simulated and measured results are different. Typically, the
C0 and C1 self-resonances are at higher frequencies in real life and the harmonic suppression is not high enough. With increased C0
and C1 values the self-resonances can be shifted down close to the 2nd and 3rd harmonic frequencies. The optimum C0 and C1 val-
ues here are around 3–3.3 pF and 1.1–1.2 pF, respectively. Additionally, a higher L0 is needed to have the L0-C0 parallel resonance,
which means that the insertion loss needs to be minimum at the fundamental frequency
Figure 4.8 Measured Characteristic of the Tline Match Given in Above Table on page 33
shows the measured impedance and the
transfer characteristic of the bench tuned match with C1=1.2 pF, C0=3.3 pF, L0=1.5 nH, and Tline length=3.5 mm. The applied SMD
elements are listed in
Table 4.1 Element Values of the Final Bench Tuned Tline Match with 3.5 mm Tline Length on page 33
. For the
two element low BOM match where no transmission line and no C1 capacitor is applied, the L0 and C0 values are identical to the val-
ues given for the Tline match.
Table 4.1. Element Values of the Final Bench Tuned Tline Match with 3.5 mm Tline Length
Tline Matching Network
Schematic Reference
Designator
Component Value
Tolerance
Part Number
Manufacturer
L0
1.5 nH
±0.1 nH
LQG15HS1N5B02
Murata
C0
3.3 pF
±0.1 pF
GRM1555C1H3R3BA01
Murata
C1
1.2 pF
±0.1 pF
GRM1555C1H1R2BA01
Murata
As shown in part A of the figure below, the impedance at the fundamental frequency is 20 + j12 Ω, which is close to the optimum 23 +
j11.5 Ω. Also, second and third harmonic suppression is around or higher than 40 dB, which yields FCC compliant harmonic levels with
large margin at a 50 Ω termination. Note that the optimum value of the parallel C0 and C1 capacitors depends on the quality of their
grounding. In the Silicon Labs reference layout, the parasitics of the ground connections are minimized by connecting the discretes
directly to a large ground metal at the top layer and to the unified inner ground layer beneath it with many parallel vias. Silicon Labs
recommends applying the same good RF grounding in customer layouts. Otherwise, slight C0 and C1 value variation/tuning may be
necessary with the L0.
a)
b)
Figure 4.8. Measured Characteristic of the Tline Match Given in Above Table
Typical measured 10 dBm (with PAVDD fed from DCDC) and 20 dBm spectrum plots with the 7x7 mm 48 pin dual band EFR32 ver-
sion, denoted by BRD4151A, in the middle of the band, 2.45 GHz, are shown in
Figure 4.11 Measured Spectrum Plots of the Dual Band
EFR32 Version (BRD4151A) with Tline Match at a) 10 dBm Power Level (DCDC on) and with 20 dBm Power Level on page 35
, re-
spectively. Measured 20 dBm, middle band Tline match spectrum plots with the 7x7 mm 48 pin, denoted by BRD4101A, and 5x5 mm
32 pin, denoted by BRD4111A, 2.4 GHz single band EFR32 versions are shown in
Figure 4.12 Measured Spectrum Plots of the Single
Band EFR32 Versions with Tline Match at 20 dBm Power State a) 7x7 mm (BRD4101A), b) 5x5 mm (BRD4111A) on page 35
, re-
spectively.
AN930: EFR32 2.4 GHz Matching Guide
Transmission Line (Tline) Match for Minimal BOM Solutions (U.S. Patent US9780757B1)
silabs.com
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