PIN No.
Signal name
IN/OUT
Connected to
Description
141
SOE0
OUT
SRAM (separation)
Read enable line to SRAM before area separation
142
SWE0
OUT
SRAM (separation)
Write enable line to SRAM before area separation
143
SCS0
OUT
SRAM (separation)
Chip select line to SRAM before area separation
144
SD00
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
145
SD01
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
146
5V
Power
147
SD02
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
148
SD03
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
149
GND
Power
150
SD04
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
151
SD05
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
152
SD06
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
153
SD07
IN/OUT
SRAM (separation)
Data line to SRAM before are separation
154
SAD0
OUT
SRAM (separation)
Address line to SRAM before area separation
155
SAD1
OUT
SRAM (separation)
Address line to SRAM before area separation
156
SAD2
OUT
SRAM (separation)
Address line to SRAM before area separation
157
SAD3
OUT
SRAM (separation)
Address line to SRAM before area separation
158
SAD4
OUT
SRAM (separation)
Address line to SRAM before area separation
159
SAD5
OUT
SRAM (separation)
Address line to SRAM before area separation
160
SAD6
OUT
SRAM (separation)
Address line to SRAM before area separation
161
SAD7
OUT
SRAM (separation)
Address line to SRAM before area separation
162
GND
Power
163
SAD8
OUT
SRAM (separation)
Address line to SRAM before area separation
164
SAD9
OUT
SRAM (separation)
Address line to SRAM before area separation
165
SAD10
OUT
SRAM (separation)
Address line to SRAM before area separation
166
SAD11
OUT
SRAM (separation)
Address line to SRAM before area separation
167
SAD12
OUT
SRAM (separation)
Address line to SRAM before area separation
168
SAD13
OUT
SRAM (separation)
Address line to SRAM before area separation
169
/f1
OUT
CCD PWB
CCD drive signal transfer clock (First phase)
170
/f2
OUT
CCD PWB
CCD drive signal transfer clock (Second phase)
171
/SH
OUT
CCD PWB
CCD drive signal shift pulse
172
5V
Power
173
RS
OUT
CCD PWB
CCD drive signal reset pulse
174
SP
OUT
CCD PWB
CCD drive signal sampling hold pulse
175
GND
Power
176
CP
OUT
CCD PWB
A/D conversion IC latch clock
177
BCLK
OUT
CCD PWB
CCD shield output latch signal
178
IDIN0
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
179
IDIN1
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
180
IDIN2
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
181
IDIN3
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
182
IDIN4
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
183
IDIN5
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
184
IDIN6
IN
CCD PWB (AD
conversion)
Image scan data (after 8bit A/D conversion)
DM-1505
11 – 8
Содержание DM-1500
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