
COMe-cWL6 – User Guide Rev. 1.4
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2.3.15.
External BIOS ROM Support/SPI
The Boot SPI0 is routed to COMe connector. BOM option allows general purpose SPI (GSPI0) to be connected to COMe
instead.
Table 22: External BIOS ROM Support
COMe Signal
PCH Pin
Description
SPI_CS#
SPI0_CS0#/SPI0_CS1# or
always high
SPI_CS# logic implemented in EC
SPI_MISO
SPI0_MISO
SPI_MOSI
SPI0_MOSI
SPI_POWER
-
connected to V_3V3_S5
BIOS_DIS0#
input to control SPI_CS# logic
BIOS_DIS1#
input to control SPI_CS# logic
COMe-cWL6 supports on-module and off-module boot from SPI. For additional safety, a second on-module SPI flash
can be populated on the board. This also requires an adoption of the FPGA/EC code. Features as SAFS together with
eSPI are under investigation and not supported.
Table 23: External BIOS ROM Support: On-module and Off-module boot from SPI
BIOS_
DIS1#
BIOS_
DIS0#
MODULE_
CS#
COME_CS#
BIOS
entry
Description
1
1
SPI0_CS0#
‘1’
Module
1
0
SPI0_CS0#
‘1’
(Module)
Not Supported
0
1
SPI0_CS1#
SPI0_CS0#
Carrier
0
0
SPI0_CS0#
SPI0_CS1#
Module
2.3.16.
Speaker Out (SPKR)
Table 24: Speaker Out (SPKR)
COMe Signal
PCH Pin
Description
SPKR
GPP_B14/SPKR
Speaker/Buzzer out
2.3.17.
Watchdog Timeout (WDT)
Table 25: Watchdog Timeout (WDT)
COMe Signal
Description
WDT
Generated from FPGA/EC