Using PEEDI
Freescale Kinetis programming
Example:
http://download.ronetix.at/peedi/cfg_examples/cortex-m/kinetis.cfg
TI/Luminary LM3S programming
Example:
http://download.ronetix.at/peedi/cfg_examples/cortex-m/lm3s8962.cfg
NXP LPC2000 programming
To successfully program a LPC2000 device make sure you have specified valid RAM address for
the CORE_WORKSPACE parameter in the PLATFORM_ARM section. The internal RAM starts
from 0x40000000, so this is a good value for this parameter.
To successfully verify the FLASH contents, first you must set the MEMMAP register to map the
flash vectors at address 0x00000000 like this:
memory write 0xE01FC040 0x00000001
You may issue the previous command every time you need to verify or you may put it in the init
section of the core in the target configuration file, this way it will be executed automatically.
To secure the LPC2000 device, your application must set FLASH address location 0x1FC (User
flash sector 0) with value 0x87654321 (2271560481 Decimal) when programmed. This will disable
the JTAG port and some of the ISP commands on the next reset.
The only way to un-secure the device is to use ISP command to erase the FLASH. This can be made
with the Philips LPC2000 FLASH utility.
For more information about the LPC2000 securing (code protection) read the LPC2000 user’s
manual.
Example:
http://download.ronetix.at/peedi/cfg_examples/arm7/lpc2138.cfg
LPC CPU’s may return an incorrect CPU ID as shown in the example below where the LPC1343
CPU is used:
PEEDI User’s Manual
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