RL78/I1D
Operation state switching IAR
R01AN3597EJ0100 Rev.1.00
Page 20 of 42
Jan. 31, 2017
Clock operation status control register (CSC)
High-speed system clock operation control: Stopped
Subsystem clock operation control: Stopped
High-speed on-chip oscillator clock operation control: Operating
Controlling the operation of the clocks
Symbol: CSC
7
6
5
4
3
2
1
0
MSTOP XTSTOP
0
0
0
0
MIOEN HIOSTOP
1
1
0
0
0
0
0
0
Bit 7
MSTOP
High-speed system clock operation control
X1 oscillation mode
External clock input
mode
Input port mode
0
X1 oscillator operating
External clock from
EXCLK pin is valid
Input port
1
X1 oscillator
stopped
External clock from
EXCLK pin is invalid
Bit 6
XTSTOP
Subsystem clock operation control
X1 oscillation mode
External clock input
mode
Input port mode
0
X1 oscillator operating
External clock from
EXCLKS pin is valid
Input port
1
XT1 oscillator
stopped
External clock from
EXCLKS pin is invalid
Bit 1
MIOEN
High-speed on-chip oscillator clock operation control
0
High-speed on-chip oscillator operating
1
High-speed on-chip oscillator stopped
Bit 0
HIOSTOP
High-speed on-chip oscillator clock operation control
0
High-speed on-chip oscillator operating
1
High-speed on-chip oscillator stopped
Caution: For details on the register setup procedures, refer to RL78/I1D User's Manual: Hardware.
