Renesas RA Family
RA2 Quick Design Guide
R01AN6060EU0100 Rev.1.00
Page 25 of 44
Sep.14.21
Table 9. PRCR Protection Bits
PRCR bit
Description
PRC0
•
Registers related to the Clock Generation Circuit:
SCKDIVCR, SCKSCR, MEMWAIT, MOSCCR, HOCOCR, MOCOCR, CKOCR,
OSTDCR, OSTDSR, MOCOUTCR, HOCOUTCR, MOSCWTCR, MOMCR, SOSCCR,
SOMCR, LOCOCR, LOCOUTCR, HOCOWTCR, SOMRG, SDADCCKCR, LPOPT
PRC1
•
Registers related to the low power modes:
SBYCR, SNZCR, SNZEDCR, SNZEDCR0, SNZREQCR, FLSTOP, OPCCR,
SOPCCR, SYOCDCR, PSMCR, DCDCCTL, VCCSEL
PRC3
•
Registers related to the LVD:
LVD1CR1, LVD1SR, LVD2CR1, LVD2SR, LVCMPCR, LVDLVLR, LVD1CR0,
LVD2CR0
PRKEY[7:0]
These bits control write access to the PRCR register. To modify the PRCR register, write
A5h to the eight higher-order bits and the wanted value to the eight lower-order bits as a
16-bit unit.
Note:
Not all registers may be included on all RA2 devices. Please refer to the “Register Write Protection”
section of the Hardware User’s Manual for more details.
Renesas FSP supplies two APIs (R_BSP_RegisterProtectEnable and R_BSP_RegisterProtectDisable) to
enable and disable Register Write Protection respectively.
9. I/O Port Configuration
The “I/O Ports” section of the Hardware User’s Manual describes exact pin configurations based on
peripheral selection and other register settings. Some general information is listed as follows.
It is important to note that after a reset, each pin will be in the default state for that pin until the configuration
is applied. For RA2 devices, all I/O pins operate as input pins immediately after a reset. There may be a
small period where some pins may be in an undesirable state. This will be true regardless of what
configuration approach is used. The user should consider the impact this may have for each application,
including how this may affect other system features.
The IO Port Configuration may be set using either direct write to registers or using the FSP Pin Configurator.
9.1 Multifunction Pin Selection Design Strategies
Most ports on the RA2 Series of MCUs can have multiple peripheral functions. Tools, such as the Pin
Configurator in FSP, are available from Renesas to assist with port selection for each RA2 device. When
several peripheral functions are needed, use the following design strategies to help with port function
selection.
•
Assign peripheral functions with only one port option first. For example, there is only one port option for
each debug signal in the debug function. When this function is needed, assign these ports first.
•
Assign peripheral functions with limited port options next. For example, the CLKOUT function typically
only has two options for the CLKOUT signal.
•
Assign peripheral functions with multiple port options last. One example would be the Serial
Communications Interface (SCI) which typically has many available port options.
•
The “Pin Lists” section in the RA2 Hardware User’s Manuals show some peripheral port functions with a
suffix (such as “_A”) at the end of the function name. For RA2 devices, this type of suffix can be ignored
when assigning port functions. Also see Section 16.3 in this document.
9.2 Setting Up and Using a Port as GPIO
There are two methods for setting up and using a port as GPIO, either using the Port Control Register
(PCNTR1), or the PmnPFS registers.
