Product Overview
R&S
®
TSVP
18
Getting Started 1152.3943.62 ─ 07
●
Programmable output level range from ‒6
V to 10
V, output impedance 30
Ω
(typ.)
●
14 bit resolution
●
Output current up to 150
mA per channel, 350
mA per port
●
Two programmable input thresholds per port for hysteresis or level monitoring
●
Pattern rate up to 40
MS/s per channel x 12.5
ns resolution
●
Memory depth 2
Msample (32
‑
bit data)
●
Synchronization/triggering via PXI trigger bus and via XTI (TTL)
3.3.8
R&S TS-PIO5
The R&S TS
‑
PIO5 digital LVDS functional test module is used wherever digital
circuits are tested by flexibly programmable static or dynamic stimulation and the
response is recorded. Bidirectional LVDS, LVTTL and RS485 transceiver chan-
nels are available for this purpose. It is intended for the R&S CompactTSVP test
platform. The module is controlled by the CompactPCI bus.
It offers the following key features:
●
Two MDR connectors, each with 10 LVDS channels (8 data, 1 universal chan-
nel, 1 clock)
LVDM bidirectional, terminated with 100
Ω
●
2 LVTTL signals per MDR connector
●
+5
V / max. 0.30
A available at every MDR connector, protected by fuse and
diode
●
10 RS485 transceiver channels available via a contact strip on the board
●
Sample rate up to 200
Msample/s
●
Maximum resolution 5
ns
●
Memory depth 2 Mpattern (32 bit)
– 10 bit RS485
– 4 bit LVTTL
– 18 bit LVDS
●
Synchronization/triggering via
– PXI trigger bus
– SMB clock/trigger input and output
– PXI 10 MHz clock
Test Modules
