Pioneer PRA-BD11, Руководство по обслуживанию

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PRA-BD11
87
5 6 7 8
5 6
7
8
C
D
F
A
B
E
Pin Function (DINB ASSY: IC8201)
XC2S50-5PQ208C (DINB ASSY: IC8201, DOOB ASSY: IC8611)
• FPGA
These parts program the pin function by configuration ROM (IC8205: DINB ASSY, IC8610: DOOB ASSY).
1 52
53
104
105 156
157
208
XC2S50-5PQ208C
Pin Arrangement (Top view)
No. Pin Name I/O Pin Function
1
2 (TMS)
3 SDI_D0 O SDI digital video signal output
4 SDI_D1 O
SDI digital video signal output
5 SDI_D2 O
SDI digital video signal output
6 SDI_D3 O
SDI digital video signal output
7 SDI_D4 O
SDI digital video signal output
8 SDI_D5 O
SDI digital video signal output
9 SDI_D6 O
SDI digital video signal output
10 SDI_D7 O SDI digital video signal output
11
12
13
14 SDI_DAI O
Data output for SDI Embedded Audio
15 SDI_BCK O
Audio clock output for SDI Embedded Audio
16 SDI_LRCK O
LR clock output for SDI Embedded Audio
17 SDI_LOCK O
The signal which shows whether the SDI-embeded signal locks H: locks, L: unlock
18
19
AES_ERROR O The signal which shows existence of an error of AES/EBU signal H: Error nothing, L: There is an error
20 MODE_SEL I
For operating mode setting of the AES/EBU receiver H: Master mode, L: Slave mode
21 TP01 O
FPGA test signal output (Not connected at AVIB side)
22 TP02 O
FPGA test signal output (Not connected at AVIB side)
23 TP03 O
FPGA test signal output (Not connected at AVIB side)
24 TP04 O FPGA test signal output (Not connected at AVIB side)
25
26
27 TP05 O FPGA test signal output (Not connected at AVIB side)
28
29 TP06 O
FPGA test signal output (Not connected at AVIB side)
30 TP07 O
FPGA test signal output (Not connected at AVIB side)
GND
−
Digital GND
I
JTAG TMS
GND
−
Digital GND
Vcco
−
I/O power supply (3.3V)
Vccint
−
Core power supply (2.5V)
GND
−
Digital GND
GND
−
Digital GND
Vcco
−
−
I/O power supply (3.3V)
Vccint Core power supply (2.5V)