PRA-BD11
79
5
6
7
8
5
6
7
8
C
D
F
A
B
E
Convert Output
Data Format
Convert
AES/EBU
Format
ANCI
Output
Control
Code
Add
CRC
Control
Registers
DIN[9:0]
10
Video Detection &
Synchronization
10
DOUT[9:0]
Delete
ANCI
Delete
TRS
10
TRS
Detect ANCI
3
LOCK
BUFERR
AUXEN
AM[2:0]
AOUTA/B
8
SAFA/B
CSA/B
UDA/B
VFLA/B
P/S
Audio
Buffer
10
Output Arbitrar y Packet
PKT[8:0]
9
10
WCOUT
ADDR[3:0],
CS, WE, RE
7
8
DATA[7:0]
MUTE
2
3
Block Diagram
DEMULTIPLEX MODE (DINB Assy)
NUMBER
SYMBOL
TYPE
DESCRIPTION
1, 17, 26, 90
VDDINT
+3.3V power supply pins for core logic.
2-4
VM[2:0]
I
Video standar d format. Used in conjunction with the TRS pin. VM[2] is the MSB
and VM[0] is the LSB. See Table 1.
5
DEMUX/MUX
I
Mode of operation. When set HIGH, the GS9023A operates in Demultiplex Mode.
When set LOW, the GS9023A operates in Multiplex Mod e.
NOTE: A device reset must be performed when switching between Multiplex and
Demultiplex Mod es while the device is pow ered up .
6-10,12-16
DIN[9:0]
I
Parallel digital video signal input. DIN[9 ] is the MSB and DIN[0] is the
LSB. The digital video input must contain TRS information.
11, 23, 25, 29,
50, 58, 71, 82,
98, 100
GND
Device ground.
18
RESET
I
Device reset. Active low.
NOTE: The video input to output d ata path will be interrupted during de vice
res t.
Pin Descriptions (DINB ASSY: IC8106)
Содержание PRA-BD11
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