Pioneer PRA-BD11, Руководство по обслуживанию

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PRA-BD11
71
5 6 7 8
5 6
7
8
C
D
F
A
B
E
Pin Function
No. Pin Name I/O Function
1 V1 I Validity bit input
2 TRANS I
Audio routing mode (in synchronous mode)
0: Normal mode 1: Audio routing (transparent) mode
3 PDN I
Power down and reset
This unit becomes powered down state when turns this pin into "L", and TXP/N pin becomes "L" and a
register is initialized.
4 MCLK I Master clock input
5 SDTI I Audio serial data input
6 BICK I/O
Audio serial data clock I/O
Serial clock for SDTI pin This pin can change to output pin by setting of DIF2-0.
7 LRCK I/O
I/O channel clock
Shows the L/R channel This pin can change to output pin by setting of DIF2-0.
8
FS0 I Sampling frequency selection 0 (in synchronous mode)
CSN I Host interface chip select (in asynchronous mode)
AKMODE I
AK4112B mode (in audio routing mode)
0: Non-AKM receiver mode, 1: AK4112B mode
9
FS1 I Sampling frequency selection 1 (in synchronous mode)
CDTI I Host interface data input (in asynchronous mode)
10
FS2 I Sampling frequency selection 2 (in synchronous mode)
CCLK I Host interface bit clock input (in asynchronous mode)
11
FS3 I Sampling frequency selection 3 (in synchronous mode)
CDTO I Host interface data output (in asynchronous mode)
12 C1 I Channel status bit input
13 ANS I
Asynchronous/Synchronous mode selection
0: Asynchronous mode, 1: Synchronous mode
14 BLS I/O
Block start I/O
In the normal mode, outputs "H" with first 4 bytes. It becomes input pin in the audio routing mode. When
PDN pin is "L" in the normal mode, BLS pin outputs "H".
15 CKS0 I Clock mode selection 0
16 CKS1 I Clock mode selection 1
17 VDD
−
Power supply, 4.75V-5.25V
18 VSS
−
Ground, 0V
19 TXN O Differential inverting output
20 TXP O Differential non-inverting output
21 DIF0 I Audio serial interface selection 0
22 DIF1 I Audio serial interface selection 1
23 DIF2 I Audio serial interface selection 2
24 U1 I User data bit input