PDP-507CMX
69
5
6
7
8
5
6
7
8
C
D
F
A
B
E
No signal
With signal
AC power ON
(Power coad
connected to the
wal outlet)
Basic operation(Numerical unit:Vdc; except for case whwn units are individually indicated)
Power
management
Standby
Name
Pin No.
Pin name
FuNon-connection termialtion
Signal direction
(DR : Data Relay)
MAIN POWER "ON"
Main power
OFF
AC Power OFF
(Power cord
pulled out of the
wall outlet
8
NC
Non-connection termial
LVDS
-
-
-
-
-
-
-
-
9
NC
Non-connection termial
LVDS
-
-
-
-
-
-
-
-
10
GND
GND
LVD S
0
0
0
0
0
0
-
11
GND
GND
LVD S
0
0
0
0
0
0
-
12
THEATE R
Advanced cinema control
signal
LVD S
0
0
0
0
0
0
MAIN LVDS
13
VIS
No use
LVD S
0
0
0
0
0
0
0
0
0
0
-
-
-
0
7
.
4
7
.
4
0
0
0
S
D
V
L
e
s
u
o
N
E
T
U
M
B
T
S
4
1
15
TXD
UART data
MAIN PDP
l
a
n
g
i
s
k
c
o
l
C
0
S
D
V
L
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
Clock signal
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
3.3
3.3
3.3
-
MAIN LVDS
16
REQ_MD
UART send request from
PDP module
n
e
h
w
c
d
V
3
.
3
0
S
D
V
L
riquest signal is
received; 0Vdc
when no riquest
signal is
received.
3.3Vdc when
riquest signal is
received; 0Vdc
when no riquest
signal is
received.
0
0
0
-
LVD S
MAIN
17
AC_OFF
AC power detection from
power supply
LVD S
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
-
LVD S
MAIN
18
RXD
UART data
PDP
MAIN
l
a
n
g
i
s
k
c
o
l
C
0
S
D
V
L
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
Clock signal
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
-
LVD S
MAIN
19
MR ST B
No use
LVD S
0
0
0
0
0
0
-
20
GND
GND
LVD S
0
0
0
0
0
0
-
AD3
1
GND
GND
0
0
0
0
0
0
0
0
0
-
CN103
2
P_REQ_MD
UART send request from
PDP module
0 3.3Vdc when
riquest signal is
received; 0Vdc
when no riquest
signal is
received.
3.3Vdc when
riquest signal is
received; 0Vdc
when no riquest
signal is
received.
0
0
0
-
PDP
LVDS
3
P_RXD_MD
UART data
PDP
MAIN
0 Clock signal
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
Clock signal
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
-
PDP
LVDS
4
P_TXD_MD
UART data
MAIN PDP
0 Clock signal
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
Clock signal
(3.3Vac) when
data are
received; 3.3Vdc
when no data are
received.
-
LVD S
PDP
5
P_AC_OFF
AC power detection from
power supply
0
-
PDP
LVDS
6
NC
Non-connection termial
-
-
-
-
-
-
-
-
7
GND
GND
0
0
0
0
0
0
0
-
8
PARA_B0
Digital video output signal
B[0]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
9
PARA_B1
Digital video output signal
B[1]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
10
PARA_B 2
Digital video output signal
B[2]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
11
PARA_B 3
Digital video output signal
B[3]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
12
PARA_B 4
Digital video output signal
B[4]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
13
PARA_B 5
Digital video output signal
B[5]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
14
PARA_B 6
Digital video output signal
B[6]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
15
PARA_B 7
Digital video output signal
B[7]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
16
PARA_B 8
Digital video output signal
B[8]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
17
PARA_B 9
Digital video output signal
B[9]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
18
GND
GND
0
0
0
0
0
0
0
0
-
19
PARA_G 0
Digital video output signal
G[0]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
20
PARA_G 1
Digital video output signal
G[1]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
21
PARA_G 2
Digital video output signal
G[2]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
22
PARA_G 3
Digital video output signal
G[3]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
23
PARA_G 4
Digital video output signal
G[4]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
24
PARA_G 5
Digital video output signal
G[5]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
25
PARA_G 6
Digital video output signal
G[6]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
26
PARA_G 7
Digital video output signal
G[7]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
27
PARA_G 8
Digital video output signal
G[8]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
28
PARA_G 9
Digital video output signal
G[9]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
29
GND
GND
0
0
0
0
0
0
-
30
PARA_R 0
Digital video output signal
R[0]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
31
PARA_R 1
Digital video output signal
R[1]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
32
PARA_R 2
Digital video output signal
R[2]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
33
PARA_R 3
Digital video output signal
R[3]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
34
PARA_R 4
Digital video output signal
R[4]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
35
PARA_R 5
Digital video output signal
R[5]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
36
PARA_R 6
Digital video output signal
R[6]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
37
PARA_R 7
Digital video output signal
R[7]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
38
PARA_R 8
Digital video output signal
R[8]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
39
PARA_R 9
Digital video output signal
R[9]
0
0
3.3Vac
0
0
0
-
LVD S
PDP
40
GND
GND
0
0
0
0
0
0
-
41
GND
GND
0
0
0
0
0
0
-
0
0
0
c
a
V
3
.
3
c
a
V
3
.
3
0
t
u
p
t
u
o
l
a
n
g
i
s
k
c
o
l
C
K
L
C
_
P
2
4
-
LVD S
PDP
43
GND
GND
0
0
0
0
0
0
-
0
0
0
c
a
V
3
.
3
c
a
V
3
.
3
0
t
u
p
t
u
o
l
a
n
g
i
s
E
D
E
D
_
A
R
A
P
4
4
-
LVD S
PDP
0
0
0
c
a
V
3
.
3
c
a
V
3
.
3
0
t
u
p
t
u
o
l
a
n
g
i
s
D
H
D
H
_
A
R
A
P
5
4
-
LVD S
PDP
0
0
0
c
a
V
3
.
3
c
a
V
3
.
3
0
t
u
p
t
u
o
l
a
n
g
i
s
D
V
D
V
_
A
R
A
P
6
4
-
LVD S
PDP
47
P_THEATE R
Advanced cinema control
signal
0
0
0
0
0
0
0
0
0
0
LVD S
PDP
48
P_INP_MUTE
Mute control signal for
LVD S Receiver outputs
0
0
0
0
0
0
-
PDP
LVDS
Содержание PDP 507CMX
Страница 18: ...PDP 507CMX 18 1 2 3 4 1 2 3 4 C D F A B E 2 6 PANEL CHASSIS SECTION 1 9 2 11 4 7 7 7 7 7 3 7 10 8 7 10 7 6 5 ...
Страница 44: ...PDP 507CMX 44 1 2 3 4 1 2 3 4 C D F A B E 4 2 OVERALL CONNECTION DIAGRAM 2 2 ...
Страница 45: ...PDP 507CMX 45 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 84: ...PDP 507CMX 84 1 2 3 4 1 2 3 4 C D F A B E 500ns div 500ns div 200ns div ...
Страница 104: ...PDP 507CMX 104 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 108: ...PDP 507CMX 108 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 208: ...PDP 507CMX 208 1 2 3 4 1 2 3 4 C D F A B E THC63LVD104AF K IC101 LVDS ASSY LVDS Receiver Block Diagram Pin Function ...
Страница 209: ...PDP 507CMX 209 5 6 7 8 5 6 7 8 C D F A B E MP2367DN LF IC302 DD ASSY Converter IC Block Diagram Pin Function ...
Страница 210: ...PDP 507CMX 210 1 2 3 4 1 2 3 4 C D F A B E NCP5211BDG IC303 DD ASSY Regulator IC Block Diagram Pin Function ...