24 |
Name
Address Size
Description
TMUX1
26
4
Select output signal on digital multiplexer 1:
0
clk_pix
1
slot_adc
2
fval
3
dval
4
sync_x_even
5
sync_x_odd
6
line_0_sample
7
line_0_adc
8
line_0_read
9
adc_ramp_r
10
adc_ramp_s
11
adc_vtzero
12
col_init
13
col_init_off
14
pix_select
15
pix_transfer
TMUX2
27
4
Select output signal on digital multiplexer 2:
0
clk_adc_gated
1
slot_pix
2
lval
3
bypass_even
4
sensor_idle
5
reset_first
6
reset_second
7
reset_third
8
row_clk_y
9
row_sync_y_read
10
row_sync_y_inte0
11
row_sync_y_inte1
12
row_sync_y_inte2
13
write
14
read
15
col_vtzero
DPLL_MULT
30
8
Digital PLL multiplication factor (252 = x10)
DPLL_EN
31
1
Disable/Enable digital PLL
DPLL_DIVMODE
31
1
Internal selection of feedback mechanism in digital
PLL
DPLL_F_RANGE
31
2
Select output frequency range of digital PLL
APLL_MULT
32
5
Analog PLL multiplication factor = APL 1
TMUXA
33
4
Select output signal on analog multiplexer:
0
ground
1
CMDN_LVDS_REC
2
CMDN_2X
3
REF144
4
REF270
5
VDCPC_ADC
6
VCLAMP_ADC
7
VBGAP_BIAS
8
VTSIG
9
VTREF
10
VREF
11
VRAMP
NVT 200-LC-4019
©2015 PHOTONIS Digital Imaging LLC
Revision: C.04
All Rights Reserved
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