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5.1 Counter
Line Input
Starts when the specified counter trigger activation condition is met on the chosen
line.
Line input source has additionally an activation configuration, which needs to be set
accordingly. Following configuration values are available:
Rising Edge
Counter starts with the rising edge on the selected line input.
Falling Edge
Counter starts with the falling edge on the selected line input
Both Edges
Counter starts with any edge on the selected line input
Level High
Counter starts and is counting events as long as the level is high. When the counter
is started, it ignores counter events as long as the corresponding line input is low.
Level Low
Counter starts and is counting events as long as the level is low. When the counter
is started, it ignores counter events as long as the corresponding line input is high.
Activation configuration has only effect when line input is selected as a counter
trigger source, otherwise this configuration is ignored.
5.1.7
Counter Reset Source
The counter reset source selects the signal which will be the used to reset the counter. The
following signals sources are available:
Off
Disables the counter reset.
Counter Trigger
Resets with the reception of a trigger on the counter trigger source (see
Section 5.1.6).
Acquisition Trigger
Resets with the reception of the acquisition trigger.
Acquisition Start
Resets with the reception of the acquisition start event.
Acquisition End
Resets with the reception of the acquisition end event.
FrameTrigger
Resets with the reception of the frame trigger.
Frame Start
Resets with the reception of the frame start event.
Frame End
Resets with the reception of the frame end event.
Frame Burst Start
Resets with the reception of the frame burst start event.
Frame Burst End
Resets with the reception of the frame burst end event.
Exposure Start
Resets with the reception of the exposure start event.
Exposure End
Resets with the reception of the exposure end event.
User Output 0 ... 7
Resets the counter as long as the selected user output bit is asserted. The
counter remains in reset state until the selected user output bit is deasserted again (see
Section 4.7).
Counter 0 ... 3 Start
Resets with the reception the chosen counter start event.
Counter 0 ... 3 End
Resets with the reception the chosen counter end event.
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Содержание MV3-D640I-M01-144-CL
Страница 10: ...1 Preface 10 of 121 MAN076 09 2017 V1 0...
Страница 34: ...4 Image Acquisition 34 of 121 MAN076 09 2017 V1 0...
Страница 46: ...6 I O Control 46 of 121 MAN076 09 2017 V1 0...
Страница 76: ...9 Pixel Data Processing 76 of 121 MAN076 09 2017 V1 0...
Страница 78: ...10 Thermoelectric Cooler TEC 78 of 121 MAN076 09 2017 V1 0...
Страница 82: ...11 Precautions 82 of 121 MAN076 09 2017 V1 0...
Страница 94: ...12 Hardware Interface 94 of 121 MAN076 09 2017 V1 0...
Страница 100: ...14 Troubleshooting 100 of 121 MAN076 09 2017 V1 0...
Страница 106: ...17 Support and Repair 106 of 121 MAN076 09 2017 V1 0...
Страница 108: ...18 References 108 of 121 MAN076 09 2017 V1 0...
Страница 112: ...A Pinouts 112 of 121 MAN076 09 2017 V1 0...
Страница 120: ...C Use Cases 120 of 121 MAN076 09 2017 V1 0...
Страница 121: ...D Document Revision History Revision Date Changes 1 0 July 2017 First version MAN076 09 2017 V1 0 121 of 121...