Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 79
TCM2.0E LA
9.
9.4.2
Diagram B, MT5335
Figure 9-3 Block diagram
9.4.3
Diagram B, MT
8
295
Figure 9-4 Block diagram
T
S
In
JPEG,MPEG
Component
An
a
log
Inp
u
t
16-
b
it DDR
DRAM B
us
JTAG
IO B
us
U
S
B2.0
UART
S
eri
a
l IF
PWM
IrDA
PCR
M
S
,
S
D,
S
M,xD
A
u
dio D
S
P
W
a
tchdog
CVB
S
/
YC Inp
u
t
A
u
dio I/F
S
PDIF, I
2
S
RTC
2-D Gr
a
phic
Vpl
a
ne
s
c
a
ler
O
S
D
s
c
a
ler
VADCx4
T
S
Dem
u
x
TV
Decoder
HDMI In
I/F
LVD
S
A
u
dio
Inp
u
t
Mix
a
nd Po
s
t
Proce
ss
ing
DDR
DRAM
Controller
BIM
ARM
HDMI
Rx
P
a
nel
VDO-In
NAND Fl
as
h
A
u
dio DAC
CKGEN
A
u
dio
Demod
De-interl
a
ce
A
u
dio In
A
u
dio
ADC
S
eri
a
l Fl
as
h
S
ervo ADC
T
u
ner
In
B
S
c
a
n
I_17950_049.ep
s
09050
8
Block Dia
g
ram
I_17950_050.ep
s
09050
8
Block Dia
g
ram