
Circuit Diagrams and PWB Layouts
10.
10-1-5
B, CHANNEL DECODER 2
19570_024_140523.eps
14-05-23
CHANNEL DECODER 2
B
B
2014-02-21
5
715RLPCB000000005
BG2-QTV FHD 2K14
GPIO_0|JTAG_TMS
GND|JTAG_TCLK
VDD_VIO1
GND|JTAG_TDI
GND|JTAG_TDO
RESETB
XTAL_O
XTAL_I|CLK_IN
ADDR
S_ADC_IP
S_ADC_IN
S_ADC_QP
S_ADC_QN
TC_ADC_P
TC_ADC_N
RSSI_ADC
CLK_IN_OUT
SDA_MAST
SCL_MAST
GND|JTAG_TRSTB
VDD_VCORE1
VDD_VCORE2
VDD_VCORE3
VDD_VCORE4
VDD_VIO2
VDD_VANA
MP_A
MP_B
DISEQC_CMD
DISEQC_IN
DISEQC_OUT
SCL_HOST
SDA_HOST
TS_VAL
TS_SYNC
TS_CLK
TS_DATA0|TS_SER
TS_DATA[1]
TS_DATA2
TS_DATA3
TS_DATA4
TS_DATA5
TS_DATA6
TS_DATA7
TS_ERR|GPIO_1
MP_C
MP_D
GND
GND_HS
L004F
30H
C025F
100nF
16V
16V
100nF
C026F
C027F
100nF
16V
16V
100nF
C028F
16V
100nF
C030F
C031F
100nF
16V
16V
100nF
C032F
C086F
22uF
6,
3V
RES
6,
3V
22uF
C087F
RES
C088F
22uF
6,3V
+1V2-DVB
+3V3-ANA2
+3V3-DEMOD2
U003F
49
35
30
29
26
25
24
23
19
18
17
16
15
14
13
12
11
10
6
5
4
2
1
36
22
48
28
20
7
47
46
45
44
43
42
41
40
39
38
37
34
33
32
31
27
21
9
8
3
C060F
10pF
50V
50V
10pF
C061F
R009F
10K
16V
100nF
C034F
+3V3-DEMOD2
S018F
50m
R017F
4,7K
4,7K
R018F
R029F
47
47
R032F
16V
100nF
C037F
C041F
100nF
16V
C044F
100nF
16V
16V
100nF
C046F
C062F
10pF
50V
C063F
50V
10pF
30H
L005F
L009F
30H
C089F
22uF
6,3V
6,3V
22uF
C090F
16V
10nF
C067F
+3V3-DEMOD2
+3V3-DVB
+3V3-ANA2
+3V3-DVB
10K
R010F
C047F
100nF
16V
R011F
10K
47
R033F
R034F
47
47
R035F
RES
50V
6,8pF
C092F
R036F
47
+3V3-DEMOD2
X005F
1
4
3
2
4,7uH
L018F
L019F
4,7uH
DB006F
DB007F
DB008F
DB009F
DB010F
50m
S021F
50V
2.2nF
C094F
DT-IF-P-DVBT2
XTAL
SDA-FE
SCL-FE
SYSTEM-RESETn
DT-IF-AGC-DVBT2
TS-CD2-DATA0
TS-CD2-CLK
TS-CD2-SYNC
TS-CD2-VALID
DT-DVBS-QP
DT-DVBS-IP
DT-IF-N-DVBT2
I2C
address
0XCE
=
DT-DVBS-AGC
F22-DISEQC-TX2
+3V3-DEMOD2
DT-SCL-TUNER
DT-SDA-TUNER
I038F
I039F
I040F
I041F
R064F
47
47
R065F
RES
RES
R068F
47
47
R069F
C136F
10pF
50V
50V
10pF
C137F
F009F
RES