Philips FM242 Скачать руководство пользователя страница 74

Страница: 74 / 90

Circuit Descriptions and List of Abbreviations

The SAA7118 is a PAL/NTSC/SECAM Digital Video Decoder
with adaptive digital comb filter and component video input. It
decodes all input standards to 4:2:2 YCbCr, which then is
processed by the SDA9400.

The SDA9400 is a motion adaptive de-interlacer, which makes
a progressive video signal from the interlaced input.
Depending on the motion in the picture, it will just interleave the
odd and even field (no motion: ABAB) or repeats the same field
twice; this is also known as line doubling (motion: AABB). The
motion detection is pixel based, with a soft-switch between
'motion' and 'no motion'.

After the de-interlacer, the signal is fed as a 4:2:2 YCbCr
progressive scan signal to the video port of the PixelWorks
processor.

The PixelWorks PW164 Scaler
The PixelWorks PW164 Image Processor is a highly integrated
(Ball Grid Array, BGA) chip, which interfaces video inputs and
computer graphics in virtually any format to the PDP.

Computer images from VGA to UXGA resolution input to the
chip can be resized to fit on the PDP. Horizontal and vertical
image scalers, coupled with intelligent frame locking circuitry
create sharp images, centred on the screen and without user
intervention. An embedded DRAM frame buffer and memory
controller perform the frame rate conversion.

Video data from 4:3 aspect ratio NTSC or PAL and 16:9 aspect
ratio sources such as HDTV and DVD are supported. Non-
linear scaling (only with Receiver Box) and separate horizontal
and vertical scalers allow these inputs to be resized optimally
for the native resolution of the PDP.

For more information, see http://www.pixelworksinc.com/
index.phtml

Table 9-1 PixelWorks Scaler: Ports

Table 9-2 PixelWorks Scaler: Video Select

Service remark: Desoldering/soldering of this BGA-ICs
requires very specialised (BGA) equipment. This can only be
done by the full-equipped service repair workshops. (See also
chapter “Safety Instructions, warning and notes”).

The EPLD
The main reason to add the EPLD, is the contrast reserve
function. Other reasons:
•

Black and white ADC adjustment. The EPLD provides a
high-resolution measurement of the black and white level,
to adjust the gain and offset of the ADC (AD9887). It is read
via I

•

LVDS reset. This function resets the LVDS transmitter on
the SCAVIO board, in case the LVDS transmitter starts up
without a clock. This could cause an abnormal picture.
Therefore, as soon as the clock is not fast enough (as
during start-up) the EPLD will keep the LVDS transmitter in
reset.

•

Receiver-box mode detection. For loop through mode (a
second FTV monitor connected to the output of the first
monitor), a secondary detection is needed to check the
presence of an Receiver or E-box.

•

ATSC sync detection/ decoding. Core for proper sync
decoding for ATSC sources.

•

Contrast reserve. This function can increase the gain of
the video signal to a factor of two. It will reduce the gain
again if it sees too many overflows (code 255) in any of the
R, G, or B channels. Adjustable via two parameters: user
contrast and overflow limit. Parameters are I

C controlled.

The LVDS transmitter
This DS90C385MTD56 IC from National Semiconductors
converts 28 bits of CMOS/TTL data into four LVDS (Low
Voltage Differential Signalling) data streams. A PLL transmit
clock is transmitted in parallel with the data streams over a fifth
LVDS link. Every cycle of the clock, 28 bits of input data are
sampled and transmitted. At a transmit clock frequency of 36
MHz, 24 bits of RGB data and 3 bits of display control data are
transmitted per LVDS data channel. This IC operates at 3.3 V

For more information, see http://www.national.com/

Picture Mute
In some cases, it is necessary to mute the video output:
•

In Monitor mode:
–

During switch 'on/off' of the monitor,

–

During source change,

–

During video or sync loss, or

–

By a user action (A/V-mute or mute)

–

In audio only mode (when the ICONN-box is
connected).

•

In TV mode:
–

During switch 'on/off' of the Monitor/Receiver box,

–

During source change in the Receiver box,

–

During video or sync loss, or

–

In audio only mode (Receiver box mutes the picture).

Most of the picture mute controls are done via the PixelWorks
co-processor.

Anti Ageing
In order to prevent visible luminance differences, due to ageing
of the monitor, a special algorithm is implemented. This
algorithm is based on horizontal shifting of the picture in the

Pin

Name

I/O

Remark

PW_SCL

+3V3 output

to I2C devices, Video
related

PW_SDA

+3V3 output

to I2C devices, Video
related

PW_S3V3 output

to I2C device NVM