Philips FM242, Руководство по обслуживанию

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38 FM242 AA 7. Electrical Diagrams and PWB Layouts
SCAVIO Panel: Function Blocks and Diagram Connections
VIDEO SELECTION MATRIX
ROMWE
PW_SCL
YS
CONTROL-FUNCTIONS
I2S_DATA_OUT
SCL_1
RC
R_OUT(0:7)
PSU_PROT STANDBY
SELECT_2
VIDEO DECODER
BOOTWE
VIDEO_SEL_1
D_CTR_NIL
CB
LIGHT_SEN_IN
PRE_OUT2_R
PW_RESET
I2S_CLOCK I2S_DATA_IN2
FAN_SP_1
SDA_1_3V3 BLANK_OUT V_SYNC_OUT
I2S_DATA_IN1
PSU_IRQ RED_LED
SELECT_3
SCL_1_3V3
D_CTR_ONE
RC FAN_SP_2
PW_SCL_NVM MCLK
PW_SDA
DCKEXT
CONTROL_FUNCTIONS
SCL_AUDIO
SDA_1
SC1_R
CR
PW_SDA
B_OUT(0:7)
SDA_AUDIO
SYNC_ACT
CVBS
H_SYNC_OUT
VIDEO SELECTION ADC
PW_SDA
G_ADC
H_HD_EXT
IR_RX
TXD_OTC
PW_SCL
V_ADC
SDA_SW
RS_232_ACT
BACK-END LVDS-OUTPUT
PW_SDA
PW_SCL
PRE_OUT2_L PRE_OUT1_R
SELECT_1
UART_ACT
SYNC-PROCESSING
G_OUT(0:7)
A(0:19)
RXD_OTC
SCALER-CLOCK-GENERATOR
SC1_L
SCAVIO PANEL (FUNCTION BLOCKS AND DIAGRAM CONNECTIONS)
ICONN_ON
IR_TX RL_ICN GL_ICN LD_ICN
AUDIO_DELAY_LINE
DCLK
PRE_OUT1_L
SCALER-PW164
+MEMORY
PW_SDA
SOURCE_SELECT
POWER_OK
V_HD_EXT
H_ADC
POWER_DOWN_EPLD
ROMOE
PW_SCL
GRN_LED
B_ADC
VGA-INPUT
SCL_SW
MSP_RESET
AUDIO PROCESSOR
AUDIO_ENABLE
PARITY_OUT
SELECT_4
PW_SDA_NVM
PWRDWN_LVDS
PW_SCL
D(0:15)
R_ADC
BACK-END EPLD
Y_HD
+9V_STBY
VREF1
+3V3_STBY_SW
+5V_STBY_SW
+8V6 +5V
+9V_STBY
+8V6
+3V3_STBY_SW +5V
+5V_POW
+8V6
+8V6
+3V3 +2V5 +5V
+5V_STBY_SW
+2V5
+3V3
MSP_RESET
POWER_OK
SCL_SW
SDA_SW
VXCA_18M432
+5V_POW
VGA1_V
VGA2_H
VGA2_V
VIDCLK
VIDEO_SEL_1
VIDEO_SEL_2
V_HD
V_SYNC_CMP
V_SYNC_LM
V_SYNC_POL_N
V_SYNC_TTL
AUDIO_PROCESSOR_FUNCTION
+5V +8V6 +9V_STBY
GND
H_SYNC_CMP
H_SYNC_POL_N
H_SYNC_TTL
IRQ_PDP
MATRIX_SEL
PARITY
PDP_GO
POWER_DOWN
PW_SCL
PW_SDA
SCL_1
SDA_1 SYNC
SYNC_SEL
TV_MODE
VGA1_H
C_SYNC_OUT
DBE(0:7)
DCLK
DEN
DGE(0:7)
DHS
DRE(0:7)
DVS
FBX_MODE
GND
GR_ADDE
GR_CLK
HD_BLANKN
HD_CLAMPN
H_HD
H_PRESENT
+5V
BACK_END
+2V5 +3V3 +8V6
1_2FH
75OHM_ON
ALT_GR_ADDE
CPU_GO
C_SYNC_LM
+3V3_STBY_SW
+3V3
V_SYNC_LM
V_SYNC_POL_N
V_SYNC_TTL
Y_OUT(0:7)
VGA2_B
VGA2_EN
VGA2_G
VGA2_H
VGA2_OUT
VGA2_OUTN
VGA2_R
VGA2_V
VIDCLK
VIDEO_SEL_1
VIDEO_SEL_2
VOUT_DEINT
VPEN
VREF1
V_HD
V_SYNC_CMP
H_HD
H_PRESENT
H_SYNC_CMP
H_SYNC_POL_N
H_SYNC_TTL
MATRIX_SEL
PW_SCL
PW_SDA
SYNC_SEL
UV_OUT(0:7)
VFIELD_DEC
VGA1_B
VGA1_G
VGA1_H
VGA1_R
VGA1_V
C_SYNC_OUT
GBE(0:7)
GBLKSPL
GBO(0:7)
GCLK
GCOAST
GGE(0:7)
GGO(0:7)
GND
GRE(0:7)
GRO(0:7) GR_ADDE
GR_CLK
HD_BLANKN
HD_CLAMPN
HOUT_DEINT
VIDEO_SELECTION_AND_AQUISITION
+3V3 +3V3_STBY_SW +5V +5V_POW +5V_STBY_SW +8V6
75OHM_ON
ADDE
ADHS
ADSOG
ADVS
ALT_GR_ADDE
CLKOUT_DEINT
C_SYNC_LM
VIDEO_SEL_1
VIDEO_SEL_2
SDA_1
SDA_2
SDA_SW
TV_MODE
TXD_PW
VGA1_B
VGA1_G
VGA1_H
VGA1_R
VGA1_V
VGA2_B
VGA2_G
VGA2_H
VGA2_OUTN
VGA2_R
VGA2_V
+8V6 +9V_STBY
CPU_GO
GND
IRQ_PDP
MSP_RESET
PDP_GO
POWER_DOWN
POWER_OK
PW_FLASH_RESET
PW_RESET
PW_START
RXD_PW
SCL_1
SCL_2
SCL_SW
MAIN_CONTROL
+3V3 +3V3_STBY_SW +5V +5V_POW +5V_STBY_SW
+3V3
VGA2_OUT
VIDCLK
VIDEO_SEL_1
VIDEO_SEL_2
VOUT_DEINT
VPEN
VXCA_18M432
Y_OUT(0:7)
PW_SCL
PW_SDA
PW_START RXD_PW
SCL_1
SCL_2
SCL_SW
SDA_1
SDA_2
SDA_SW
SYNC
SYNC_SEL
TXD_PW
UV_OUT(0:7)
VFIELD_DEC
VGA2_EN
DVS
FBX_MODE
GBE(0:7)
GBLKSPL
GBO(0:7)
GCLK
GCOAST
GGE(0:7)
GGO(0:7)
GND
GRE(0:7)
GRO(0:7)
HOUT_DEINT
PARITY
PW_FLASH_RESET PW_RESET
+2V5 +3V3 +3V3_STBY_SW +5V
1_2FH
ADDE
ADHS
ADSOG
ADVS
CLKOUT_DEINT
DBE(0:7)
DCLK
DEN
DGE(0:7)
DHS
DRE(0:7)
SDA_1
SDA_1
SCL_1
SCL_1
SYNC_SEL SYNC_SEL
VGA2_H
VGA2_V
VIDEO_SEL_1
VIDEO_SEL_1
VIDEO_SEL_2
VIDEO_SEL_2
HD_BLANKN
HD_CLAMPN
HD_CLAMPN
HD_BLANKN
SCALER_AND_CONTROL
VGA1_H
VGA1_H
VGA1_V
VGA1_V
GR_CLK
GR_CLK
GR_ADDE
GR_ADDE
ALT_GR_ADDE
ALT_GR_ADDE
TV_MODE
CPU_GO
PDP_GO
IRQ_PDP
POWER_DOWN
TV_MODE
TV_MODE
SDA_SW
SCL_SW
PW_FLASH_RESET
VIDCLK
SCL_2
PW_START
H_SYNC_POL_N
VGA2_OUTN
VGA2_OUT
VGA2_EN
VGA2_EN
VGA2_OUT
FBX_MODE
MSP_RESET
POWER_OK
ADDE
ADHS
ADSOG
ADVS
ADSOG
ALT_GR_ADDE
GR_ADDE
GR_CLK
RXD_PW
TXD_PW
VGA1_V
VGA2_B
VGA2_G
VGA2_H
VGA2_R
VGA2_OUTN
VGA2_V
VGA1_B
VGA1_G
VGA1_H
VGA1_R
VGA1_V
VGA2_B
VGA2_G
VGA2_H
VGA2_R
VGA2_V
GBLKSP
SDA_2
PW_RESET
V_SYNC_TTL
75OHM_ON
C_SYNC_LM
C_SYNC_OUT
H_HD
H_PRESENT
H_SYNC_CMP
H_SYNC_POL_N
H_SYNC_TTL
MATRIX_SEL
V_HD
V_SYNC_CMP
V_SYNC_LM
V_SYNC_POL_N
V_SYNC_TTL
VGA1_B
VGA1_G
VGA1_H
VGA1_R
DEN
DHS
DVS
PARITY
DCLK
DEN
DHS
DVS
PARITY
PW_SCL
PW_SDA
75OHM_ON
C_SYNC_LM
C_SYNC_OUT
H_HD
H_PRESENT
H_SYNC_CMP
H_SYNC_TTL
MATRIX_SEL
V_HD
V_SYNC_CMP
V_SYNC_LM
V_SYNC_POL_N
PW_SCL
PW_SDA
VFIELD_DEC
VOUT_DEINT
VPEN
GBO(0:7)
GBLKSP
GCLK
GCOAST
GGO(0:7)
GBE(0:7)
GGE(0:7)
GRE(0:7)
GRO(0:7)
GCLK
GCOAST
ADHS
ADVS
ADDE
VXCA_18M432
DCLK
DBE(0:7)
DGE(0:7)
DRE(0:7)
GBE(0:7)
GGO(0:7)
GRO(0:7)
GBO(0:7)
UV_OUT(0:7)
Y_OUT(0:7)
UV_OUT(0:7)
Y_OUT(0:7)
CLKOUT_DEINT
HOUT_DEINT
PW_SCL
PW_SDA
VFIELD_DEC
VOUT_DEINT
VPEN
GGE(0:7)
DRE(0:7)
DGE(0:7)
DBE(0:7)
GRE(0:7)
CLKOUT_DEINT
HOUT_DEINT
CL 26532038_035.eps
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