28
DP-IF8000
A0
A1
I/O0
A2
A3
CS
1
2
3
4
A4
A5
A6
A7
13
14
15
16
5
1, 048, 576 BIT
MEMORY ARRAY
I/O CONTROL
I/O BUFFER
CONTROL
LOGIC
ADDRESS
DECODER
6
I/O1
7
I/O2 10
I/O3 11
WE 12
VDD
8
GND
9
32
31
30
29
A16
A15
A14
A13
OE
I/O7
I/O6
GND
VDD
I/O5
I/O4
A12
A11
A10
A9
A8
28
27
26
25
24
23
22
21
20
19
18
17
9
10
11
12
13
20
39
48
CKOUT
8
7 6
5
4
3 2 1
47
46
45
44
43
42
41
40
38
37
14
15
16
17
18
19
21
22
23
24
BCK
LRCK
DATA
XSTATE
XMCK
XOUT
XIN
AUDIO
EMPHA
CE
CL
XSEL
MODE0
MODE1
DOSEL0
DOSEL1
CKSEL0
CKSEL1
XMODE
INPUT
PLL
XTAL1
29
36
35
34
33
32
31
30
28
27
26
25
CSFLAG
F0
F1
F2
VF
LOCK
BPSYNC
ERROR
DO
DI
DISEL
SPDIF
DIN0
DIN1
DIN2
DGND
DVDD
R
VIN
LPF
A
VDD
AGND
DGND
DVDD
DVDD
DGND
DGND
DVDD
TIMING
DATA
DEMODULATOR
LOCK
DETECTION
fs
CALCULATION
MICROPROCESSOR INTERF
ACE
C BIT DETECTION
Pa,PbDETECTION
+ –
6
7
5
8
B
+
–
2
1
3
4
A
A OUT
A IN–
A IN+
VEE
VCC
B OUT
B IN–
B IN+
1
2
3
4
5
6
7
8
9
10
14
13
12
11
SELECT
LOGIC
VDD
VCO
OUT
FIN-A
FIN-B
PFD
OUT
LOGIC
GND
PFD
VCO
1/2 DIVIDER
NC
PFD
INHIBIT
VCO
INHIBIT
VCO
GND
VCO
IN
R BIAS
VCO
VDD
z
IC Block Diagrams
–TX SECTION–
IC13, 14, 15 IDT71V124SA12PH-TL IC10 TLC2932IPWR
IC3 NJM4558M-TE2
IC4 LC89056W-E
Содержание DP-IF8000
Страница 37: ...37 DP IF8000 ...