13
DP-IF8000
Pin No.
Pin name
I/O
Description
1
P120
I
Error signal input from DIR.
2
P121
I
No audio signal input from DIR.
3
P122
I
EMPHASIS signal input from DIR.
4
P123
I
F0 signal input from DIR.
5
P124
I
F1 signal input from DIR.
6
P125
I
F2 signal input from DIR.
7
P126
I
STATE signal input from DIR.
8
P127
I
Serial data signal input from DIR.
9
VDD
I
Power supply terminal.
10
X2
O
Connect for crystal for main clock oscillator (8MHz).
11
X1
I
Connect for crystal for main clock oscillator (8MHz).
12
VSS
—
Ground Terminal.
13
XT2
—
Not used (OPEN).
14
XT1
—
Not used (Fixed at "L").
15
RESET
I
Reset signal input.
16
P00
O
SPI SLAVE select signal output.
17
P01
O
Decorder CS signal output.
18
P02
O
DIR CS signal output.
19
P03
O
CS signal output for DA converter.
20
P04
O
DIAT latch signal output.
21
P05
I
Serial date input from decoder.
22
P06
—
Not used (OPEN).
23
AVDD
—
Power supply terminal.
24
AVREF0
—
Ground Terminal.
25
P10
I
Not used (OPEN).
26
P11
—
Not used (OPEN).
27
P12
I
Not used (OPEN).
28
P13
I
Not used (OPEN).
29
P14
I
Not used (OPEN).
30
P15
I
Not used (OPEN).
31
P16
—
Not used (OPEN).
32
P17
I
Not used (OPEN).
33
AVSS
—
Analog ground terminal.
34
ANO0/P130
—
Not used (OPEN).
35
ANO1/P131
—
Not used (OPEN).
36
AVREF1
I
Power supply terminal.
37
SI2
I
DIR serial data input.
38
SO2
O
DIR serial data output.
39
SCK2
O
DIR serial clock output.
40
SI1
I
Main serial data input.
41
SO1
O
Main serial data output.
42
SCK1
O
Main serial clock output.
43
P23
I
Main DSP request signal input.
44
P24
—
Not used (OPEN).
45
SI0
I
Serial data input.
46
SO0
O
Serial data output.
SECTION 6
DIAGRAMS
6-1. EXPLANATION OF IC TERMINALS
• IC18 MPD784218AGC-158-8EU (Program, System control) (1/2)
Содержание DP-IF8000
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