Orban OPTIMOD 8685, Руководство по эксплуатации, Страница: 337 / 357

OPTIMOD SURROUND PROCESSOR TECHNICAL DATA
6-81
DAC_MCLK
RSTIO
DAC_BCLK
DAC_DATA
DAC_FCLK
U_Pg2 Analog_Out
Pg2 Analog_Out.SchDoc
DAC_MCLK
RSTIO
DAC_BCLK
DAC_DATA
DAC_FCLK
DIN_DATA1
DIN_DATA2
DIN_DATA3
AOUT_DATA
AOUT_BCLK
AOUT_FCLK
IN_BCLK
IN_FCLK
PILOT_BCLK
PILOT_WCLK
DOUT_DATA1
18_432MHZ
36_864MHZ
FPGA_24_576MHZ
33_8688MHZ
16_384MHZ
DOUT_FCLK
DOUT_DATA2
DOUT_DATA3
DOUT_BCLK
HOST_TX_A
HOST_RX_A
PIC_RESET
PILOT_DATA
COMP_DATA
COMP_BCLK
COMP_WCLK
GENLOC_PWR_GOOD
PIC_24_576MHZ
U_Pg7 Power_Interface
Pg7 Power_Interface.SchDoc
DIN_DATA1
DIN_DATA2
DIN_DATA3
HOST_RX_A
AOUT_DATA
AOUT_BCLK
AOUT_FCLK
IN_BCLK
IN_FCLK
PILOT_BCLK
PILOT_WCLK
DOUT_DATA1
18_432MHZ
36_864MHZ
FPGA_24_576MHZ
33_8688MHZ
16_384MHZ
DOUT_FCLK
DOUT_DATA2
DOUT_DATA3
DOUT_BCLK
HOST_TX_A
PIC_RESET
PILOT_DATA
COMP_DATA
COMP_BCLK
COMP_WCLK
DDQS[3..0]
DDQM[3..0]
DDCLK1_P
DDCLK1_N
DDWE
DDCAS
DDRAS
DDCS
DDA[13..0]
DDD[31..0]
DDCLKE
DDBA[1..0]
DDCLK2_P
DDCLK2_N
U_Pg9 DDR SDRAM
Pg9 DDR SDRAM.SchDoc
DDQS[3..0]
DDQM[3..0]
DDCLK1_P
DDCLK1_N
DDWE
DDCAS
DDRAS
DDCS
DDA[13..0]
DDD[31..0]
DDCLKE
DDBA[1..0]
DDCLK2_P
DDCLK2_N
U_Pg17 SRC_Power_Dist
Pg17 SRC_Power_Dist.SchDoc
U_Pg12 GTP Power Filters
Pg12 GTP Power Filters.SchDoc
ENCODED_AUDIO_DATA
ENCODED_AUDIO_BCK
ENCODED_AUDIO_LRCK
DECODER_VSYNC
DEC_METADATA
DEC_METASUB_DATA
DEC_METASUB_BCK
DEC_METASUB_LRCK
DOLBY_DEC_LRCK
DOLBY_DEC_BCK
DOLBY_DEC_1-2
DOLBY_DEC_3-4
DOLBY_DEC_5-6
DOLBY_DEC_7-8
DOLBY_DEC_AUX
SPI_SCK
SPI_SDO
SPI_SDI
DOLBY_DEC_STAT[7..0]
ENCODER_IN_AUDIO_DATA0
ENCODER_IN_AUDIO_BCK0
ENCODER_IN_AUDIO_LRCK0
ENCODER_IN_AUDIO_DATA1
ENCODER_IN_AUDIO_BCK1
ENCODER_IN_AUDIO_LRCK1
ENCODER_IN_AUDIO_DATA2
ENCODER_IN_AUDIO_BCK2
ENCODER_IN_AUDIO_LRCK2
ENCODER_IN_AUDIO_DATA3
ENCODER_IN_AUDIO_BCK3
ENCODER_IN_AUDIO_LRCK3
ENCODER_OUT_AUDIO_DATA0
ENCODER_OUT_AUDIO_BCK0
ENCODER_OUT_AUDIO_LRCK0
ENCODER_METADATA_IN
ENC_VSYNC
DOLBY_ENC_CNTRL[19..0]
DOLBY_ENC_STAT[1..0]
PMD[7..0]
DOLBY_DEC_CNTRL0
DOLBY_DEC_CNTRL1
DOLBY_DEC_CNTRL2
DOLBY_DEC_CNTRL3
SPI_DEV_CS13
SPI_DEV_CS14
ENC_RES[4..0]
U_Pg13 Dolby E
Pg13 Dolby E.SchDoc
ENCODED_AUDIO_DATA
ENCODED_AUDIO_BCK
ENCODED_AUDIO_LRCK
DECODER_VSYNC
DOLBY_DEC_LRCK
DOLBY_DEC_BCK
SPI_SCK
SPI_SDO
ENCODER_IN_AUDIO_DATA0
ENCODER_IN_AUDIO_BCK0
ENCODER_IN_AUDIO_LRCK0
ENCODER_IN_AUDIO_DATA1
ENCODER_IN_AUDIO_BCK1
ENCODER_IN_AUDIO_LRCK1
ENCODER_IN_AUDIO_DATA2
ENCODER_IN_AUDIO_BCK2
ENCODER_IN_AUDIO_LRCK2
ENCODER_IN_AUDIO_DATA3
ENCODER_IN_AUDIO_BCK3
ENCODER_IN_AUDIO_LRCK3
ENCODER_METADATA_IN
ENC_VSYNC
DOLBY_ENC_CNTRL[19..0]
PMD[7..0]
DOLBY_DEC_CNTRL0
DOLBY_DEC_CNTRL1
DOLBY_DEC_CNTRL2
DOLBY_DEC_CNTRL3
DEC_METADATA
DEC_METASUB_DATA
DEC_METASUB_BCK
DEC_METASUB_LRCK
DOLBY_DEC_1-2
DOLBY_DEC_3-4
DOLBY_DEC_5-6
DOLBY_DEC_7-8
DOLBY_DEC_AUX
SPI_SDI
DOLBY_DEC_STAT[7..0]
ENCODER_OUT_AUDIO_DATA0
ENCODER_OUT_AUDIO_BCK0
ENCODER_OUT_AUDIO_LRCK0
DOLBY_ENC_STAT[1..0]
SPI_DEV_CS13
SPI_DEV_CS14
SDI_ILRCK_1-2
SDI_IBCK_1-2
SDI_IDATA_1-2
SDI_IN_LRCK_3-4
SDI_IN_BCK_3-4
SDI_IN_DATA_1-2
SDI_IREF_CLK_1-2
SDI_IDATA_3-4
SDI_IREF_CLK_3-4
SDI_ILRCK_5-6
SDI_IBCK_5-6
SDI_IDATA_5-6
SDI_IN_LRCK_5-6
SDI_IN_BCK_5-6
SDI_IREF_CLK_5-6
SDI_IDATA_7-8
SDI_IREF_CLK_7-8
SDI_OUT_LRCK_1-2
SDI_OUT_BCK_1-2
SDI_OUT_DATA_1-2
SDI_OUT_LRCK_5-6
SDI_OUT_BCK_5-6
SDI_OUT_DATA_5-6
SDI_OLRCK_1-2
SDI_OBCK_1-2
SDI_ODATA_1-2
SDI_OREF_CLK_1-2
SDI_ODATA_3-4
SDI_OREF_CLK_3-4
SDI_OLRCK_5-6
SDI_OBCK_5-6
SDI_ODATA_5-6
SDI_OREF_CLK_5-6
SDI_ODATA_7-8
SDI_OREF_CLK_7-8
SDI_OUT_DATA_7-8
SDI_OUT_DATA_3-4
SDI_OLRCK_3-4
SDI_OBCK_3-4
SDI_OLRCK_7-8
SDI_OBCK_7-8
SDI_ILRCK_3-4
SDI_IBCK_3-4
SDI_ILRCK_7-8
SDI_IBCK_7-8
SDI_IN_LRCK_1-2
SDI_IN_BCK_1-2
SDI_IN_LRCK_7-8
SDI_IN_BCK_7-8
SDI_OUT_LRCK_3-4
SDI_OUT_BCK_3-4
SDI_OUT_LRCK_7-8
SDI_OUT_BCK_7-8
U_Pg5 SDI_IO
Pg5 SDI_IO.SchDoc
SDI_ILRCK_1-2
SDI_IBCK_1-2
SDI_IDATA_1-2
SDI_IN_LRCK_3-4
SDI_IN_BCK_3-4
SDI_IREF_CLK_1-2
SDI_IDATA_3-4
SDI_IREF_CLK_3-4
SDI_ILRCK_5-6
SDI_IBCK_5-6
SDI_IDATA_5-6
SDI_IN_LRCK_5-6
SDI_IN_BCK_5-6
SDI_IREF_CLK_5-6
SDI_IDATA_7-8
SDI_IREF_CLK_7-8
SDI_OUT_LRCK_1-2
SDI_OUT_BCK_1-2
SDI_OUT_LRCK_5-6
SDI_OUT_BCK_5-6
SDI_OLRCK_1-2
SDI_OBCK_1-2
SDI_ODATA_1-2
SDI_OREF_CLK_1-2
SDI_ODATA_3-4
SDI_OREF_CLK_3-4
SDI_OLRCK_5-6
SDI_OBCK_5-6
SDI_ODATA_5-6
SDI_OREF_CLK_5-6
SDI_ODATA_7-8
SDI_OREF_CLK_7-8
SDI_OLRCK_3-4
SDI_OBCK_3-4
SDI_OLRCK_7-8
SDI_OBCK_7-8
SDI_ILRCK_3-4
SDI_IBCK_3-4
SDI_ILRCK_7-8
SDI_IBCK_7-8
SDI_IN_LRCK_1-2
SDI_IN_BCK_1-2
SDI_IN_LRCK_7-8
SDI_IN_BCK_7-8
SDI_OUT_LRCK_3-4
SDI_OUT_BCK_3-4
SDI_OUT_LRCK_7-8
SDI_OUT_BCK_7-8
SDI_IN_DATA_1-2
SDI_OUT_DATA_1-2
SDI_OUT_DATA_5-6
SDI_OUT_DATA_7-8
SDI_OUT_DATA_3-4
ENC_RES[4..0]
HD_MUTE1 MGT_VID1_RX_P
MGT_VID1_RX_N
HD_CD1
MGT_VID1_TX_P
MGT_VID1_TX_N
HD_SD1
SYNC_SDENB
SYNC_SCL
SYNC_SDA
SYNC_LOCK
SYNC_V_OUT
SYNC_H_OUT
SYNC_BACKPORCH
SYNC_SYNC_OUT
SYNC_V_BLANK
SYNC_ODDEVEN
SDI_BYPASS
U_Pg3 Video_IO
Pg3 Video_IO.SchDoc
HD_MUTE1
MGT_VID1_TX_P
MGT_VID1_TX_N
HD_SD1
SYNC_SDENB
SYNC_SCL
SYNC_SDA
SDI_BYPASS
MGT_VID1_RX_P
MGT_VID1_RX_N
HD_CD1
SYNC_LOCK
SYNC_V_OUT
SYNC_H_OUT
SYNC_BACKPORCH
SYNC_SYNC_OUT
SYNC_V_BLANK
SYNC_ODDEVEN
RXCKO_1-2
RX_LRCK_1-2
RX_BCK_1-2
AES_IDATA_1-2
AES_ILRCK_1-2
AES_IBCK_1-2
AES_IREFCLK1_1-2
TX_LRCK_1-2
TX_BCK_1-2
AES_OLRCK_1-2
AES_OBCK_1-2
AES_ODATA_1-2
TX_LRCK_3-4
TX_BCK_3-4
AES_OLRCK_3-4
AES_OBCK_3-4
AES_ODATA_3-4
TX_MCLK_1-2
RXCKO_3-4
RX_LRCK_3-4
RX_BCK_3-4
RXCKO_5-6
RX_LRCK_5-6
RX_BCK_5-6
TX_MCLK_3-4
AES_IDATA_3-4
AES_ILRCK_3-4
AES_IBCK_3-4
AES_IDATA_5-6
AES_ILRCK_5-6
AES_IBCK_5-6
AES_OREFCLK_1-2
AES_OREFCLK_3-4
AES_IREFCLK1_3-4
AES_IREFCLK1_5-6
AES_IREFCLK2_1-2
AES_IREFCLK2_3-4
AES_IREFCLK2_5-6
TX_LRCK_5-6
TX_BCK_5-6
TX_MCLK_5-6
AES_OREFCLK_5-6
AES_OLRCK_5-6
AES_OBCK_5-6
AES_ODATA_5-6
AES_IDATA_7-8
U_Pg4 AES_IO
Pg4 AES_IO.SchDoc
AES_ILRCK_1-2
AES_IBCK_1-2
AES_IREFCLK1_1-2
TX_LRCK_1-2
TX_BCK_1-2
AES_OLRCK_1-2
AES_OBCK_1-2
AES_ODATA_1-2
TX_LRCK_3-4
TX_BCK_3-4
AES_OLRCK_3-4
AES_OBCK_3-4
AES_ODATA_3-4
TX_MCLK_1-2
TX_MCLK_3-4
AES_ILRCK_3-4
AES_IBCK_3-4
AES_ILRCK_5-6
AES_IBCK_5-6
AES_OREFCLK_1-2
AES_OREFCLK_3-4
AES_IREFCLK1_3-4
AES_IREFCLK1_5-6
AES_IREFCLK2_1-2
AES_IREFCLK2_3-4
AES_IREFCLK2_5-6
TX_LRCK_5-6
TX_BCK_5-6
TX_MCLK_5-6
AES_OREFCLK_5-6
AES_OLRCK_5-6
AES_OBCK_5-6
AES_ODATA_5-6
AES_IDATA_7-8
RXCKO_1-2
RX_LRCK_1-2
RX_BCK_1-2
AES_IDATA_1-2
RXCKO_3-4
RX_LRCK_3-4
RX_BCK_3-4
RXCKO_5-6
RX_LRCK_5-6
RX_BCK_5-6
AES_IDATA_3-4
AES_IDATA_5-6
SPI_SDI
SPI_SDO
SPI_SCK
RSTIO
PIC_INT
SPI_DEV_CS1
SPI_DEV_CS2
SPI_DEV_CS3
SPI_DEV_CS4
SPI_DEV_CS5
SPI_DEV_CS6
SPI_DEV_CS7
SPI_DEV_CS8
SPI_DEV_CS9
SPI_DEV_CS10
SPI_DEV_CS11
SPI_DEV_CS15
U_Pg16 SRC_Misc Signals
Pg16 SRC_Misc Signals.SchDoc
SPI_SDI
SPI_SDO
SPI_SCK
RSTIO
SPI_DEV_CS1
SPI_DEV_CS2
SPI_DEV_CS3
SPI_DEV_CS4
SPI_DEV_CS5
SPI_DEV_CS6
SPI_DEV_CS7
SPI_DEV_CS8
SPI_DEV_CS9
SPI_DEV_CS10
SPI_DEV_CS11
SPI_DEV_CS15
PIC_INT
HOST_TX_A HOST_RX_A
PMD[7..0] PMALL
PMRD
PMWR
PMCS2
SPI_SDI
SPI_SDO
SPI_SCK
RSTIO
PIC_RESET
PIC_FPGA_SPARE0
PIC_FPGA_SPARE1
SPI_DEV_CS1
PIC_INT
SPI_DEV_CS2
SPI_DEV_CS3
SPI_DEV_CS4
SPI_DEV_CS5
SPI_DEV_CS6
SPI_DEV_CS7
SPI_DEV_CS8
SPI_DEV_CS9
SPI_DEV_CS10
SPI_DEV_CS11
SPI_DEV_CS12
SPI_DEV_CS13
SPI_DEV_CS14
PIC_OUT_METADATA_SDO
PIC_OUT_METADATA_SCK
PIC_IN_METADATA_SDI
PIC_IN_METADATA_SCK
PIC_VSYNC
PIC_IN_METADATA_SS
PIC_OUT_METADATA_SS
PIC_24_576MHZ
SYNC_SDENB
SYNC_SCL
SYNC_SDA
SPI_DEV_CS15
U_Pg6 PIC
Pg6 PIC.SchDoc
HOST_TX_A
PMD[7..0]
SPI_SDI
PIC_RESET
PIC_FPGA_SPARE0
PIC_FPGA_SPARE1
PIC_INT
PIC_IN_METADATA_SDI
PIC_IN_METADATA_SCK
PIC_VSYNC
PIC_IN_METADATA_SS
PIC_24_576MHZ
SYNC_SDA
HOST_RX_A
PMALL
PMRD
PMWR
PMCS2
SPI_SDO
SPI_SCK
RSTIO
SPI_DEV_CS1
SPI_DEV_CS2
SPI_DEV_CS3
SPI_DEV_CS4
SPI_DEV_CS5
SPI_DEV_CS6
SPI_DEV_CS7
SPI_DEV_CS8
SPI_DEV_CS9
SPI_DEV_CS10
SPI_DEV_CS11
SPI_DEV_CS12
SPI_DEV_CS13
SPI_DEV_CS14
PIC_OUT_METADATA_SDO
PIC_OUT_METADATA_SCK
PIC_OUT_METADATA_SS
SYNC_SDENB
SYNC_SCL
SPI_DEV_CS15 RXCKO_7-8
RX_LRCK_7-8
RX_BCK_7-8
AES_IDATA_7-8
AES_ILRCK_7-8
AES_IBCK_7-8
AES_IREFCLK1_7-8
AES_IREFCLK2_7-8
SYNCIN_LRCK
SYNCIN_SCLK
SYNCIN_RMCK
SPI_SDI
SPI_SDO
SPI_SCK
RSTIO
SPI_DEV_CS12
SYNCIN_MCLK
U_Pg11 AES Sync
Pg11 AES Sync.SchDoc
AES_ILRCK_7-8
AES_IBCK_7-8
AES_IREFCLK1_7-8
AES_IREFCLK2_7-8
SPI_SDI
SPI_SDO
SPI_SCK
RSTIO
SPI_DEV_CS12
SYNCIN_MCLK
RXCKO_7-8
RX_LRCK_7-8
RX_BCK_7-8
AES_IDATA_7-8
SYNCIN_LRCK
SYNCIN_SCLK
SYNCIN_RMCK
PCLK1
RX_USRCLK_P
RX_USRCLK_N
TX_REFCLK_P
TX_REFCLK_N
GENLOC_CLNR_RST
CLNR_SKEW_EN
CLNR_DOUBLE
CLNR_IPSEL
CLK_CLNR_LOCK
GENLOC_PWR_GOOD
U_Pg14 Clock Cleaner
Pg14 Clock Cleaner.SchDoc
PCLK1 GENLOC_CLNR_RST
GENLOC_SPI_CLK
GENLOC_SPI_SDIN
GENLOC_SPI_CS
GENLOC_HSYNC
GENLOC_VSYNC
GENLOC_FSYNC
GENLOC_SPI_SDOUT
U_Pg15 Genlock
Pg15 Genlock.SchDoc
PCLK1
RX_USRCLK_P
RX_USRCLK_N
GENLOC_CLNR_RST
CLNR_SKEW_EN
CLNR_DOUBLE
CLNR_IPSEL
GENLOC_CLNR_RST
GENLOC_SPI_CLK
GENLOC_SPI_SDIN
GENLOC_SPI_CS
GENLOC_HSYNC
GENLOC_VSYNC
GENLOC_FSYNC
TX_REFCLK_P
TX_REFCLK_N
CLK_CLNR_LOCK
GENLOC_PWR_GOOD
PCLK1
GENLOC_SPI_SDOUT
GENLOC_PWR_GOOD
DDD[31..0]
DDQS[3..0]
DDA[13..0]
DDQM[3..0]
DDCLK1_P
DDCLK1_N
DDCLK2_N
DDCLK2_P
DDCLKE
DDWE
DDCAS
DDRAS
DDCS
DDBA[1..0]
MGT_VID1_RX_P
MGT_VID1_RX_N
HD_CD1
MGT_VID1_TX_P
MGT_VID1_TX_N
HD_SD1
HD_MUTE1
MGTCLK_1485_P
MGTCLK_1485_N
XO_160_P
XO_160_N
SYNC_LOCK
SYNC_V_OUT
SYNC_H_OUT
SYNC_BACKPORCH
SYNC_V_BLANK
SYNC_ODDEVEN
SYNC_SYNC_OUT
DAC_MCLK
DAC_BCLK
DAC_DATA
DAC_FCLK
RXCKO_1-2
RX_LRCK_1-2
RX_BCK_1-2
RXCKO_3-4
RX_LRCK_3-4
RX_BCK_3-4
RXCKO_5-6
RX_LRCK_5-6
RX_BCK_5-6
RXCKO_7-8
RX_LRCK_7-8
RX_BCK_7-8
AES_IREFCLK1_1-2
TX_LRCK_1-2
TX_BCK_1-2
TX_LRCK_3-4
TX_BCK_3-4
TX_MCLK_1-2
TX_MCLK_3-4
AES_IDATA_1-2
AES_ILRCK_1-2
AES_IBCK_1-2
AES_IDATA_3-4 AES_ILRCK_3-4
AES_IBCK_3-4 AES_IDATA_5-6
AES_ILRCK_5-6
AES_IBCK_5-6
AES_IDATA_7-8
AES_ILRCK_7-8
AES_IBCK_7-8
SDI_IDATA_1-2
SDI_IREF_CLK_1-2
SDI_IDATA_3-4
SDI_IREF_CLK_3-4
SDI_IDATA_5-6
SDI_IREF_CLK_5-6
SDI_IDATA_7-8
SDI_IREF_CLK_7-8
SDI_IN_DATA_1-2
SDI_OLRCK_1-2
SDI_OBCK_1-2
SDI_ODATA_1-2
SDI_OREF_CLK_1-2
SDI_OLRCK_3-4
SDI_OBCK_3-4
SDI_ODATA_3-4
SDI_OREF_CLK_3-4
SDI_OLRCK_5-6
SDI_OBCK_5-6
SDI_ODATA_5-6
SDI_OREF_CLK_5-6
SDI_OLRCK_7-8
SDI_OBCK_7-8
SDI_ODATA_7-8
SDI_OREF_CLK_7-8
SDI_OUT_DATA_1-2
SDI_OUT_DATA_5-6
SDI_OUT_DATA_7-8
SDI_OUT_DATA_3-4
PMRD
PMWR
PMALL
ENCODED_AUDIO_DATA
ENCODED_AUDIO_BCK
ENCODED_AUDIO_LRCK
DECODER_VSYNC
DEC_METADATA
DEC_METASUB_DATA
DEC_METASUB_BCK
DEC_METASUB_LRCK
DOLBY_DEC_LRCK
DOLBY_DEC_BCK
DOLBY_DEC_1-2
DOLBY_DEC_3-4
DOLBY_DEC_5-6
DOLBY_DEC_7-8
DOLBY_DEC_AUX
ENCODER_IN_AUDIO_DATA0
ENCODER_IN_AUDIO_BCK0
ENCODER_IN_AUDIO_LRCK0
ENCODER_IN_AUDIO_DATA1
ENCODER_IN_AUDIO_BCK1
ENCODER_IN_AUDIO_LRCK1
ENCODER_IN_AUDIO_DATA2
ENCODER_IN_AUDIO_BCK2
ENCODER_IN_AUDIO_LRCK2
ENCODER_IN_AUDIO_DATA3
ENCODER_IN_AUDIO_BCK3
ENCODER_IN_AUDIO_LRCK3
ENCODER_METADATA_IN
ENCODER_OUT_AUDIO_DATA0
ENCODER_OUT_AUDIO_BCK0
ENCODER_OUT_AUDIO_LRCK0
ENC_VSYNC
DOLBY_DEC_STAT[7..0]
DOLBY_ENC_CNTRL[19..0]
DOLBY_ENC_STAT[1..0]
DOUT_DATA1
DOUT_FCLK
DOUT_DATA2
DOUT_DATA3
DOUT_BCLK
18_432MHZ
36_864MHZ
FPGA_24_576MHZ
33_8688MHZ
16_384MHZ
DIN_DATA1
DIN_DATA2
DIN_DATA3
AOUT_DATA
AOUT_BCLK
AOUT_FCLK
IN_BCLK
IN_FCLK
PILOT_BCLK
PILOT_WCLK
PILOT_DATA
COMP_DATA
COMP_BCLK
COMP_WCLK
DOLBY_DEC_CNTRL0
DOLBY_DEC_CNTRL1
DOLBY_DEC_CNTRL2
DOLBY_DEC_CNTRL3
PMCS2
PIC_FPGA_SPARE0
PIC_FPGA_SPARE1
PMD[7..0]
SYNCIN_LRCK
SYNCIN_SCLK
SYNCIN_RMCK
AES_OLRCK_1-2
AES_OBCK_1-2
AES_ODATA_1-2
AES_OLRCK_3-4
AES_OBCK_3-4
AES_ODATA_3-4
SYNCIN_MCLK
PIC_OUT_METADATA_SDO
PIC_OUT_METADATA_SCK
PIC_IN_METADATA_SCK
PIC_IN_METADATA_SDI
PIC_VSYNC
AES_OREFCLK_1-2
AES_OREFCLK_3-4
PIC_IN_METADATA_SS
PIC_OUT_METADATA_SS
AES_IREFCLK1_3-4
AES_IREFCLK1_5-6
AES_IREFCLK1_7-8
AES_IREFCLK2_1-2
AES_IREFCLK2_3-4
AES_IREFCLK2_5-6
AES_IREFCLK2_7-8
ENC_RES[4..0]
SDI_BYPASS
SDI_IN_LRCK_3-4
SDI_IN_BCK_3-4
SDI_IN_LRCK_1-2
SDI_IN_BCK_1-2
SDI_IN_LRCK_5-6
SDI_IN_BCK_5-6
SDI_IN_LRCK_7-8
SDI_IN_BCK_7-8
XO_200_P
XO_200_N
XO_1485_FSEL
SDI_ILRCK_1-2
SDI_IBCK_1-2
SDI_ILRCK_7-8
SDI_IBCK_7-8
SDI_OUT_LRCK_1-2
SDI_OUT_BCK_1-2
SDI_OUT_LRCK_3-4
SDI_OUT_BCK_3-4
SDI_OUT_LRCK_5-6
SDI_OUT_BCK_5-6
SDI_OUT_LRCK_7-8
SDI_OUT_BCK_7-8
SDI_ILRCK_3-4
SDI_IBCK_3-4
SDI_ILRCK_5-6
SDI_IBCK_5-6
TX_LRCK_5-6
TX_BCK_5-6
TX_MCLK_5-6
AES_OREFCLK_5-6
AES_OLRCK_5-6
AES_OBCK_5-6
AES_ODATA_5-6
TX_REFCLK_P
TX_REFCLK_N
RX_USRCLK_P
RX_USRCLK_N
GENLOC_CLNR_RST
CLNR_DOUBLE
CLNR_SKEW_EN
CLNR_IPSEL
CLK_CLNR_LOCK
GENLOC_SPI_CLK
GENLOC_SPI_SDIN
GENLOC_SPI_CS
GENLOC_SPI_SDOUT
GENLOC_HSYNC
GENLOC_VSYNC
GENLOC_FSYNC
U_Pg8 FPGA
Pg8 FPGA.SchDoc
DDA[13..0]
DDQM[3..0]
DDCLK1_P
DDCLK1_N
DDCLK2_N
DDCLK2_P
DDCLKE
DDWE
DDCAS
DDRAS
DDCS
DDBA[1..0]
MGT_VID1_TX_P
MGT_VID1_TX_N
HD_SD1
HD_MUTE1
DAC_MCLK
DAC_BCLK
DAC_DATA
DAC_FCLK
AES_IREFCLK1_1-2
TX_LRCK_1-2
TX_BCK_1-2
TX_LRCK_3-4
TX_BCK_3-4
TX_MCLK_1-2
TX_MCLK_3-4
AES_ILRCK_1-2
AES_IBCK_1-2
AES_ILRCK_3-4
AES_IBCK_3-4
AES_ILRCK_5-6
AES_IBCK_5-6
AES_ILRCK_7-8
AES_IBCK_7-8
SDI_IDATA_1-2
SDI_IREF_CLK_1-2
SDI_IDATA_3-4
SDI_IREF_CLK_3-4
SDI_IDATA_5-6
SDI_IREF_CLK_5-6
SDI_IDATA_7-8
SDI_IREF_CLK_7-8
SDI_OLRCK_1-2
SDI_OBCK_1-2
SDI_ODATA_1-2
SDI_OREF_CLK_1-2
SDI_OLRCK_3-4
SDI_OBCK_3-4
SDI_ODATA_3-4
SDI_OREF_CLK_3-4
SDI_OLRCK_5-6
SDI_OBCK_5-6
SDI_ODATA_5-6
SDI_OREF_CLK_5-6
SDI_OLRCK_7-8
SDI_OBCK_7-8
SDI_ODATA_7-8
SDI_OREF_CLK_7-8
ENCODED_AUDIO_DATA
ENCODED_AUDIO_BCK
ENCODED_AUDIO_LRCK
DECODER_VSYNC
DOLBY_DEC_LRCK
DOLBY_DEC_BCK
ENCODER_IN_AUDIO_DATA0
ENCODER_IN_AUDIO_BCK0
ENCODER_IN_AUDIO_LRCK0
ENCODER_IN_AUDIO_DATA1
ENCODER_IN_AUDIO_BCK1
ENCODER_IN_AUDIO_LRCK1
ENCODER_IN_AUDIO_DATA2
ENCODER_IN_AUDIO_BCK2
ENCODER_IN_AUDIO_LRCK2
ENCODER_IN_AUDIO_DATA3
ENCODER_IN_AUDIO_BCK3
ENCODER_IN_AUDIO_LRCK3
ENCODER_METADATA_IN
ENCODER_OUT_AUDIO_BCK0
ENCODER_OUT_AUDIO_LRCK0
ENC_VSYNC
DOLBY_ENC_CNTRL[19..0]
DIN_DATA1
DIN_DATA2
DIN_DATA3
DOLBY_DEC_CNTRL0
DOLBY_DEC_CNTRL1
DOLBY_DEC_CNTRL2
DOLBY_DEC_CNTRL3
AES_OLRCK_1-2
AES_OBCK_1-2
AES_ODATA_1-2
AES_OLRCK_3-4
AES_OBCK_3-4
AES_ODATA_3-4
SYNCIN_MCLK
PIC_IN_METADATA_SCK
PIC_IN_METADATA_SDI
PIC_VSYNC
AES_OREFCLK_1-2
AES_OREFCLK_3-4
PIC_IN_METADATA_SS
AES_IREFCLK1_3-4
AES_IREFCLK1_5-6
AES_IREFCLK1_7-8
AES_IREFCLK2_1-2
AES_IREFCLK2_3-4
AES_IREFCLK2_5-6
AES_IREFCLK2_7-8
ENC_RES[4..0]
SDI_BYPASS
SDI_IN_LRCK_3-4
SDI_IN_BCK_3-4
SDI_IN_LRCK_1-2
SDI_IN_BCK_1-2
SDI_IN_LRCK_5-6
SDI_IN_BCK_5-6
SDI_IN_LRCK_7-8
SDI_IN_BCK_7-8
XO_1485_FSEL
SDI_ILRCK_1-2
SDI_IBCK_1-2
SDI_ILRCK_7-8
SDI_IBCK_7-8
SDI_OUT_LRCK_1-2
SDI_OUT_BCK_1-2
SDI_OUT_LRCK_3-4
SDI_OUT_BCK_3-4
SDI_OUT_LRCK_5-6
SDI_OUT_BCK_5-6
SDI_OUT_LRCK_7-8
SDI_OUT_BCK_7-8
SDI_ILRCK_3-4
SDI_IBCK_3-4
SDI_ILRCK_5-6
SDI_IBCK_5-6
TX_LRCK_5-6
TX_BCK_5-6
TX_MCLK_5-6
AES_OREFCLK_5-6
AES_OLRCK_5-6
AES_OBCK_5-6
AES_ODATA_5-6
RX_USRCLK_P
RX_USRCLK_N
GENLOC_CLNR_RST
CLNR_DOUBLE
CLNR_SKEW_EN
CLNR_IPSEL
GENLOC_SPI_CLK
GENLOC_SPI_SDIN
GENLOC_SPI_CS
GENLOC_HSYNC
GENLOC_VSYNC
GENLOC_FSYNC
DDD[31..0]
DDQS[3..0]
MGT_VID1_RX_P
MGT_VID1_RX_N
HD_CD1
MGTCLK_1485_P
MGTCLK_1485_N
XO_160_P
XO_160_N
SYNC_LOCK
SYNC_V_OUT
SYNC_H_OUT
SYNC_BACKPORCH
SYNC_V_BLANK
SYNC_ODDEVEN
SYNC_SYNC_OUT
RXCKO_1-2
RX_LRCK_1-2
RX_BCK_1-2
RXCKO_3-4
RX_LRCK_3-4
RX_BCK_3-4
RXCKO_5-6
RX_LRCK_5-6
RX_BCK_5-6
RXCKO_7-8
RX_LRCK_7-8
RX_BCK_7-8
AES_IDATA_1-2
AES_IDATA_3-4
AES_IDATA_5-6
AES_IDATA_7-8
SDI_IN_DATA_1-2
SDI_OUT_DATA_1-2
SDI_OUT_DATA_5-6
SDI_OUT_DATA_7-8
SDI_OUT_DATA_3-4
PMRD
PMWR
PMALL
DEC_METADATA
DEC_METASUB_DATA
DEC_METASUB_BCK
DEC_METASUB_LRCK
DOLBY_DEC_1-2
DOLBY_DEC_3-4
DOLBY_DEC_5-6
DOLBY_DEC_7-8
DOLBY_DEC_AUX
ENCODER_OUT_AUDIO_DATA0
DOLBY_DEC_STAT[7..0]
DOLBY_ENC_STAT[1..0]
DOUT_DATA1
DOUT_FCLK
DOUT_DATA2
DOUT_DATA3
DOUT_BCLK
18_432MHZ
36_864MHZ
FPGA_24_576MHZ
33_8688MHZ
16_384MHZ
AOUT_DATA
AOUT_BCLK
AOUT_FCLK
IN_BCLK
IN_FCLK
PILOT_BCLK
PILOT_WCLK
PILOT_DATA
COMP_DATA
COMP_BCLK
COMP_WCLK
PMCS2
PIC_FPGA_SPARE0
PIC_FPGA_SPARE1
PMD[7..0]
SYNCIN_LRCK
SYNCIN_SCLK
SYNCIN_RMCK
PIC_OUT_METADATA_SDO
PIC_OUT_METADATA_SCK
PIC_OUT_METADATA_SS
XO_200_P
XO_200_N
TX_REFCLK_P
TX_REFCLK_N
CLK_CLNR_LOCK
GENLOC_SPI_SDOUT
XO_1485_FSEL MGTCLK_1485_P
MGTCLK_1485_N
XO_160_P
XO_160_N
XO_200_P
XO_200_N
U_Pg10 Clocks_XO
Pg10 Clocks_XO.SchDoc
MGTCLK_1485_P
MGTCLK_1485_N
XO_160_P
XO_160_N
XO_200_P
XO_200_N
XO_1485_FSEL
PIC_24_576MHZ
HD-SDI I/O BOARD:
Schematic: System Interconnect
62360.000
(sheet 1 of 17)