EVBUM2789
17
Table 9. INTERRUPT ACKNOWLEDGE REGISTER 2
Name: INTACK2
Address: 01h
Type: W1C
Default: 00000000b (00h)
Trigger: Dual Edge [D7..D0]
D7
D6
D5
D4
D3
D2
D1
D0
Spare = 0
ACK_TSD
ACK_TWARN
ACK_TPREW
Spare = 0
ACK_BUS
ACK_CLK
ACK_PG
Bit
Bit Description
ACK_PG
Power Good Sense Acknowledgement
0: Cleared
1: DC
−
DC Power Good Event detected
ACK_CLK
Working Clock Indicator Acknowledgement
0: Cleared
1: DC
−
DC switching frequency source changed
ACK_BUS
Double write Error Acknowledgement
0: Cleared
1: Invalid double write access
ACK_TPREW
Thermal Pre Warning Sense Acknowledgement
0: Cleared
1: Thermal Pre Warning Event detected
ACK_TWARN
Thermal Warning Sense Acknowledgement
0: Cleared
1: Thermal Warning Event detected
ACK_TSD
Thermal Shutdown Sense Acknowledgement
0: Cleared
1: Thermal Shutdown Event detected
Table 10. INTERRUPT SENSE REGISTER 1
Name: INTSEN1
Address: 02h
Type: R
Default: 00000000b (00h)
Trigger: N/A
D7
D6
D5
D4
D3
D2
D1
D0
Spare = 0
SEN_UVLO
SEN_UVP
SEN_OVP
Spare = 0
Spare= 0
SEN_IDCDCHS SEN_IDCDCLS
Bit
Bit Description
SEN_IDCDCLS
DC
−
DC negative over current sense
0: DC
−
DC negative current is below limit
1: DC
−
DC negative current is over limit
SEN_IDCDCHS
DC
−
DC over current sense
0: DC
−
DC output current is below limit
1: DC
−
DC output current is over limit
SEN_OVP
PV
IN
Overvoltage Protection Sense
0: OVP not detected
1: OVP detected
SEN_UVP
PV
IN
Undervoltage Protection Sense
0: UVP not detected
1: UVP detected
SEN_UVLO
Under Voltage Sense
0: Input Voltage higher than UVLO threshold
1: Input Voltage lower than UVLO threshold