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NCP1060, NCV1060, NCP1063, NCV1063

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28

Power Dissipation and Heatsinking

The NCP106X welcomes two dissipating terms, the DSS

current−source (when active) and the MOSFET. Thus, P

tot

= P

DSS

+ P

MOSFET

. It is mandatory to properly manage the

heat generated by losses. If no precaution is taken, risks exist
to trigger the internal thermal shutdown (TSD). To help
dissipating the heat, the PCB designer must foresee large
copper areas around the package. Take the PDIP−7 package
as an example, when surrounded by a surface approximately
200 mm

2

of 35

m

m copper, the maximum power the device

can thus evacuate is:

P

max

+

T

Jmax

*

T

ambmax

R

q

JA

(eq. 10)

which gives around 870 mW for an ambient of 50

°

C and a

maximum junction of 150

°

C. If the surface is not large

enough, the R

θ

JA

is growing and the maximum power the

device can evacuate decreases. Figure 49 gives a possible
layout to help drop the thermal resistance.

Figure 49. A Possible PCB Arrangement to Reduce the Thermal Resistance Junction−to−Ambient

Bill of material:

C1

Bulk capacitor, input DC voltage is connected to the capacitor

C2, R1, D1

Clamping elements

C3

Vcc capacitor

OK1

Optocoupler

R2

Resistor to setting I

PEAK

current

Table 5. ORDERING INFORMATION

Device

Frequency

R

DS(on)

Brown In

Package Type

Shipping

NCP1060AP060G

60 kHz

34

Yes

PDIP−7

(Pb−Free)

50 Units / Rail

NCP1060AP100G

100 kHz

34

Yes

50 Units / Rail

NCP1060AD060R2G

60 kHz

34

Yes

SOIC−10

(Pb−Free)

2500 / Tape & Reel

NCP1060AD100R2G

100 kHz

34

Yes

2500 / Tape & Reel

NCP1060BD060R2G

60 kHz

34

No

2500 / Tape & Reel

NCV1060BD060R2G*

60 kHz

34

No

2500 / Tape & Reel

NCP1060BD100R2G

100 kHz

34

No

2500 / Tape & Reel

NCP1063AP060G

60 kHz

11.4

Yes

PDIP−7

(Pb−Free)

50 Units / Rail

NCP1063AP100G

100 kHz

11.4

Yes

50 Units / Rail

NCP1063AD060R2G

60 kHz

11.4

Yes

SOIC−16

(Pb−Free)

2500 / Tape & Reel

NCV1063AD060R2G*

60 kHz

11.4

Yes

2500 / Tape & Reel

NCP1063AD100R2G

100 kHz

11.4

Yes

2500 / Tape & Reel

*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.

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Содержание NCP1060

Страница 1: ...non isolated and in isolated topologies Features Built in 700 V MOSFET with RDS on of 34 W NCP1060 and 11 4 W NCP1063 Large Creepage Distance Between High voltage Pins Current Mode Fixed Frequency Operation 60 kHz or 100 kHz 130 kHz on demand Adjustable Peak Current see below table Fixed Ramp Compensation Direct Feedback Connection for Non isolated Converter Internal and Adjustable Over Power Prot...

Страница 2: ...rs the internal circuitry This pin is connected to an external capacitor The VDD includes an auto recovery over voltage protection 3 3 6 LIM OPP Ipeak set Over power limitation The current drown from the pin decreases Ipeak of the primary winding If resistive divider from the auxiliary winding is connected to this pin it sets the OPP compen sation level it diminishes the peak current 4 4 7 FB Feed...

Страница 3: ... LIM OPP pin floating no limit output power Optocoupler feedback Typical Non isolated Application Buck Converter If the output voltage is above 9 0 V typ between VCC ON level and VOVP level VCC supplied from output via D2 R2 limits maximal output power Direct feedback resistive divider formed by R3 R4 sets output voltage VCC supplied from DSS Output voltage is below 9 0 V typ LIM OPP pin floating ...

Страница 4: ... V typ between VCC ON level and VOVP level VCC supplied from output via D4 LIM OPP pin floating no limit output power Resistive divider formed by R2 R3 sets output volt age Typical Non isolated Application Flyback Converter VCC supplied from auxil iary winding Resistive divider formed by R2 R3 sets output pow er limit and over power protection Optocoupler feedback re sistive divider formed by R6 R...

Страница 5: ...rt Reset Reset SS as recoving from SCP TSD VCC OVP or UVLO ICOMP to CS setpoint IFreeze Ipk 0 VCC OSC Sawtooth Foldback LineOK LineOK Sawtooth Ipflag Ramp compensation OFF VCC OVP SKIP 1 è Shut down some blocks to reduce consumption SKIP ILMOP VLMOP ILMDEC ILMDEC ILMOP 0 IPKL IFB VCOMP REF ICOMPskip ICOMPfault ILMOP min ILMOP max Jittering VOVP FB COMP Processing Figure 2 Simplified Internal Circu...

Страница 6: ...e Junction to Air SOIC10 with 200 mm of 35 m copper area RθJA 132 C W Thermal Resistance Junction to Air SOIC16 with 200 mm of 35 m copper area RθJA 104 C W Junction Temperature Range TJ 40 to 150 C Storage Temperature Range Tstg 60 to 150 C Human Body Model ESD Capability All pins except HV pin per JEDEC JESD22 A114F HBM 2 kV Charged Device Model ESD Capability per JEDEC JESD22 C101E CDM 1 kV Str...

Страница 7: ...BVDSS Power Switch Circuit Startup breakdown voltage ID off 120 mA Tj 25 C 7 8 6 10 13 16 700 V IDSS off Power Switch Startup breakdown voltage off state leakage current Tj 125 C Vds 700 V 7 8 6 10 13 16 84 mA tr tf Switching characteristics RL 50 W VDS set for Idrain 0 7 x Ilim Turn on time 90 10 Turn off time 10 90 7 8 6 10 13 16 20 10 ns ton min Minimum on time NCP1060 NCP1063 7 8 6 10 13 16 20...

Страница 8: ...dback Input VCOMP 2 5 V 4 7 3 2 3 3 3 4 V IFB Input Bias Current VFB 3 3 V 4 7 1 mA GM Transconductance 5 8 2 mS IOTAlim OTA maximum current capability VFB VOTAen 5 8 150 mA VOTAen FB voltage to disable OTA 4 7 0 7 1 3 1 7 V COMPENSATION SECTION ICOMPfault COMP current for which Fault is detected 5 8 40 mA ICOMP100 COMP current for which internal current set point is 100 IIPK 0 5 8 44 mA ICOMPfree...

Страница 9: ...compensation 100 kHz NCP1060 NCP1063 14 26 mA ms PROTECTIONS tSCP Fault validation further to error flag assertion 35 48 ms trecovery OFF phase in fault mode 400 ms VOVP VCC voltage at which the switcher stops pulsing 2 5 17 0 18 0 18 8 V tOVP The filter of VCC OVP comparator 80 ms VHV EN The drain pin voltage above which allows MOSFET operate which is detected after TSD UVLO SCP or VCC OVP mode A...

Страница 10: ...e Figure 7 IDSS off vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 6 88 6 90 6 92 6 94 6 96 6 98 7 00 100 80 60 40 20 0 20 40 0 100 200 300 400 600 700 800 Figure 8 ICC1 60 kHz vs Temperature Figure 9 ICC1 100 kHz vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 0 88 0 89 0 90 0 91 0 92 0 93 0 94 0 95 100 80 60 40 20 0 20 40 0 92 0 93 0 94 0 95 0 96 0 97 0 98 ...

Страница 11: ...ure 12 Istart1 vs Temperature Figure 13 Istart2 vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 0 2 4 8 10 12 100 80 60 40 20 0 20 40 0 0 1 0 2 0 3 0 4 0 5 0 6 Figure 14 RDS on 1060 vs Temperature Figure 15 RDS on 1063 vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 0 10 20 30 40 50 60 70 100 80 60 40 20 0 20 40 0 5 10 15 20 25 CURRENT mA CURRENT mA CURRENT mA...

Страница 12: ... Figure 19 Ifreeze1063 vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 100 101 103 104 105 106 108 109 100 80 60 40 20 0 20 40 256 258 262 264 266 268 272 274 Figure 20 D max vs Temperature Figure 21 fmin vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 65 6 65 7 65 8 65 9 66 0 66 1 66 2 100 80 60 40 20 0 20 40 24 4 24 6 24 8 25 0 25 2 25 4 25 6 25 8 FREQUENCY ...

Страница 13: ...ure Figure 25 VHV EN vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 17 4 17 5 17 6 17 8 17 9 18 0 18 1 18 2 100 80 60 40 20 0 20 40 84 85 86 87 88 90 91 92 Figure 26 VREF vs Temperature Figure 27 VOTAen vs Temperature TEMPERATURE C TEMPERATURE C 100 80 60 40 20 0 20 40 3 24 3 26 3 27 3 28 3 30 3 31 3 33 3 34 100 80 60 40 20 0 20 40 0 0 2 0 4 0 6 0 8 1 2 1 4 1 6 TIME ms TIME ms ...

Страница 14: ...Peak during Transformer Saturation vs Junction Temperature TJ JUNCTION TEMPERATURE C 125 100 75 50 25 0 25 50 0 1 0 1 5 2 5 I DS PK A 150 0 5 2 0 NCP1063 NCP1060 Figure 29 Breakdown Voltage vs Temperature TEMPERATURE C 100 75 50 25 0 25 50 0 925 0 95 0 975 1 025 1 05 1 075 BV DSS BV DSS 25 C 125 1 0 ...

Страница 15: ...safe burst mode Line detection An internal comparator monitors the drain voltage as recovering from one of the following situations Short Circuit Protection VCC OVP is confirmed UVLO TSD If the drain voltage is lower than the internal threshold VHV EN the internal power switch is inhibited This avoids operating at too low ac input This is also called brown in function in some fields For applicatio...

Страница 16: ...or A version and if bulk voltage is above Vstart min 21 V dc for B version Figure 30 details the simplified internal circuitry VCC on VCC min Istart1 Vbulk 5 8 1 CVCC Rlimit I1 ICC1 I2 VCC 18 V àOVP fault Drain VOVP Figure 30 The Internal Arrangement of the Start up Circuitry Being loaded by the circuit consumption the voltage on the VCC capacitor goes down When VCC is below VCC min level 7 5 V ty...

Страница 17: ...age event In that case the over voltage protection OVP circuit and immediately stops the output pulses for trecovery duration 400 ms typically Then a new start up attempt takes place to check whether the fault has disappeared or not The OVP paragraph gives more design details on this particular section Fault Condition Short circuit on VCC In some fault situations a short circuit can purposely occu...

Страница 18: ... burst mode The VCC is maintained by the current source and self supplies the controller IpFlag Timer DRV internal 48 ms typ 400 ms typ Fault Open loop FB VCC on VCC min VCC VCOMP Auto recovery Over Voltage Protection The particular NCP106X arrangement offers a simple way to prevent output voltage runaway when the optocoupler fails As Figure 33 shows a comparator monitors the VCC pin If the auxili...

Страница 19: ...ternal V CC min V CC on VOVP Fault level 48 ms typ 400 ms typ Figure 34 describes the main signal variations when the part operates in auto recovery OVP Soft start The NCP106X features a 4 ms soft start which reduces the power on stress but also contributes to lower the output overshoot Figure 35 shows a typical operating waveform The NCP106X features a novel patented structure which offers a bett...

Страница 20: ...equency of 300 Hz Figure 36 shows the relationship between the jitter ramp and the frequency deviation It is not possible to externally disable the jitter 60 kHz 63 6 kHz 56 4 kHz Jitter ramp Internal sawtooth adjustable Figure 36 Modulation Effects on the Clock Signal by the Jittering Sawtooth Line Detection for A version only An internal comparator monitors the drain voltage as recovering from o...

Страница 21: ... of the IPK 0 The only way to further reduce the transmitted power is to diminish the operating frequency down to Fmin 25 kHz typically This value is reached at a COMP current level of ICOMPfold end 100 mA typically Below this point if the output power continues to decrease the part enters skip cycle for the best noise free performance in no load conditions Figure 37 and Figure 38 depict the adopt...

Страница 22: ...ypically RCOMP up and the effective pull up voltage is 2 7 V typically VCOMP REF When ICOMP is decreases the COMP voltage will increase to 3 2 V Figure 40 COMP Pin Voltage vs Current 0 0 5 1 1 5 2 2 5 3 3 5 180 160 140 120 100 80 60 40 20 0 V COMP V ICOMP μA Figure 41 depicts the skip mode block diagram When the COMP current information reaches ICOMPskip the internal clock setting the flip flop is...

Страница 23: ...the current sense offset A way to reduce the power capability at high line is to capitalize on the negative voltage swing present on the auxiliary diode anode During the power switch on time this point dips to NVin N being the turns ratio between the primary winding and the auxiliary winding The negative plateau on auxiliary winding will have an amplitude dependant on the input voltage Resistors R...

Страница 24: ... set point varies with power switch on time which is caused by the ramp compensation 0 100 200 300 400 500 600 700 800 900 0 10 20 30 40 50 60 70 Ipk set point mA Dutty Ratio NCP1060 NCP1063 FB Pin Function The FB pin is used in non isolated SMPS application only Portion of the output voltage is connected into the pin The voltage is compared with internal VREF 3 3 V using Operation Transconductanc...

Страница 25: ...p because of a large leakage inductance or in normal operation as shown in Figure 46 This condition sets the maximum voltage that can be reflected during toff As a result the Flyback voltage which is reflected on the drain at the switch opening cannot be larger than the input voltage When selecting components you thus must adopt a turn ratio which adheres to the following equation N ǒVout Vf Ǔ t V...

Страница 26: ... in CCM dmax N ǒVout Vf Ǔ N ǒVout Vf Ǔ Vin min eq 4 1 1 Vin min N Vout Vf 0 44 5 To obtain the primary inductance we have the choice between two equations L ǒVin dǓ 2 fsw K Pin eq 5 where K DIL ILavg and defines the amount of ripple we want in CCM see Figure 47 Small K deep CCM implying a large primary inductance a low bandwidth and a large leakage inductance Large K approaching DCM where the RMS ...

Страница 27: ... 4 Typical values are between 100 pF and up to 470 pF Large capacitors increase capacitive losses Figure 48b the most standard circuitry is called the RCD network You calculate Rclamp and Cclamp using the following formulae Rclamp 2 Vclamp ǒVclamp N Vout Vf Ǔ Lleak Ileak 2 fsw eq 9 Cclamp Vclamp Vripple fsw Rclamp Vclamp is usually selected 50 80 V above the reflected value N x Vout Vf The diode n...

Страница 28: ...Figure 49 A Possible PCB Arrangement to Reduce the Thermal Resistance Junction to Ambient Bill of material C1 Bulk capacitor input DC voltage is connected to the capacitor C2 R1 D1 Clamping elements C3 Vcc capacitor OK1 Optocoupler R2 Resistor to setting IPEAK current Table 5 ORDERING INFORMATION Device Frequency RDS on Brown In Package Type Shipping NCP1060AP060G 60 kHz 34 Yes PDIP 7 Pb Free 50 U...

Страница 29: ... EXCEED 0 10 INCH 5 DIMENSION E IS MEASURED AT A POINT 0 015 BELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C 6 DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNCONSTRAINED 7 DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE LEADS WHERE THE LEADS EXIT THE BODY 8 PACKAGE CONTOUR IS OPTIONAL ROUNDED OR SQUARE CORNERS E1 M 8X c D1 B H NOTE 5 e e 2 A2 NOTE 3 M B M NOT...

Страница 30: ...NSIONS A AND B ARE TO BE DETERM INED AT DATUM F 6 A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY D E H A1 A DIM D MIN MAX 4 80 5 00 MILLIMETERS E 3 80 4 00 A 1 25 1 75 b 0 31 0 51 e 1 00 BSC A1 0 10 0 25 A3 0 17 0 25 L 0 40 0 80 M 0 8 H 5 80 6 20 C M 0 25 M _ _ DIMENSION MILLIMETERS For additional information on our Pb Free strategy and solder...

Страница 31: ...requirements or standards regardless of any support or applications information provided by ON Semiconductor Typical parameters which may be provided in ON Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s techni...

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