NCP1060, NCV1060, NCP1063, NCV1063
www.onsemi.com
16
Application Information
Startup Sequence
When the power supply is first powered from the mains
outlet, the internal current source (typically 8.0 mA) is
biased and charges up the V
CC
capacitor from the drain pin.
Once the voltage on this V
CC
capacitor reaches the V
CC(on)
level (typically 9.0 V), the current source turns off and
pulses are delivered by the output stage: the circuit is awake
and activates the power MOSFET if the bulk voltage is
above V
HV(EN)
level (87 V typically) for A version and if
bulk voltage is above V
start(min)
(21 V dc) for B version.
Figure 30 details the simplified internal circuitry.
+
−
V
CC(on)
V
CC( min)
I
start1
V
bulk
5
8
1
C
VCC
R
limit
I1
I
CC1
I2
VCC > 18 V ?
à
OVP fault
Drain
+−
V
OVP
Figure 30. The Internal Arrangement of the Start−up Circuitry
Being loaded by the circuit consumption, the voltage on
the V
CC
capacitor goes down. When V
CC
is below V
CC(min)
level (7.5 V typically), it activates the internal current source
to bring V
CC
toward V
CC(on)
level and stops again: a cycle
takes place whose low frequency depends on the V
CC
capacitor and the IC consumption. A 1.5 V ripple takes place
on the V
CC
pin whose average value equals (V
CC(on)
+
V
CC(min)
)/2. Figure 31 portrays a typical operation of the
DSS.
