NCP1060, NCV1060, NCP1063, NCV1063
www.onsemi.com
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V
CC
9.0 V
V
CCTH
Startup Duration
Figure 31. The Charge/Discharge Cycle Over a 1
m
F V
CC
Capacitor
Device
Internal
Pulses
7.5 V
TIME (ms)
V (V)
As one can see, even if there is auxiliary winding to provide
energy for V
CC
, it happens that the device is still biased by
DSS during start−up time or some fault mode when the
voltage on auxiliary winding is not ready yet. The V
CC
capacitor shall be dimensioned to avoid V
CC
crosses V
CC(off)
level, which stops operation. The
Δ
V between V
CC(min)
and
V
CC(off)
is 0.5 V. There is no current source to charge V
CC
capacitor when driver is on, i.e. drain voltage is close to zero.
Hence the V
CC
capacitor can be calculated using
C
VCC
w
I
CC1
@
D
max
f
OSC
@
D
V
(eq. 1)
Take the 60 kHz device as an example. C
VCC
should be
above
0.8 m
@
72%
54 kHz
@
0.5
+
21 nF.
A margin that covers the temperature drift and the voltage
drop due to switching inside FET should be considered, and
thus a capacitor above 0.1
m
F is appropriate.
The V
CC
capacitor has only a supply role and its value
does not impact other parameters such as fault duration or
the frequency sweep period for instance. As one can see on
Figure 30, an internal OVP comparator, protects the
switcher against lethal V
CC
runaways. This situation can
occur if the feedback loop optocoupler fails, for instance,
and you would like to protect the converter against an over
voltage event. In that case, the over voltage protection
(OVP) circuit and immediately stops the output pulses for
t
recovery
duration (400 ms typically). Then a new start−up
attempt takes place to check whether the fault has
disappeared or not. The OVP paragraph gives more design
details on this particular section.
Fault Condition – Short−circuit on V
CC
In some fault situations, a short−circuit can purposely
occur between V
CC
and GND. In high line conditions (V
HV
= 370 V
DC
) the current delivered by the startup device will
seriously increase the junction temperature. For instance,
since I
start1
equals 5 mA (the min corresponds to the highest
T
j
), the device would dissipate 370 x 5 m = 1.85 W. To avoid
this situation, the controller includes a novel circuitry made
of two startup levels, I
start1
and I
start2
. At power−up, as long
as V
CC
is below a 1.4 V level, the source delivers I
start2
(around 500
m
A typical), then, when V
CC
reaches 1.4 V, the
source smoothly transitions to I
start1
and delivers its nominal
value. As a result, in case of short−circuit between V
CC
and
GND, the power dissipation will drop to 370 x 500
m
=
185 mW. Figure 31 portrays this particular behavior.
The first startup period is calculated by the formula C x V
= I x t, which implies a 1
m
x 1.4 / 500
m
= 2.8 ms startup time
for the first sequence. The second sequence is obtained by
toggling the source to 8 mA with a delta V of V
CC(on)
–
V
CCTH
= 9.0 – 1.4 = 7.6 V, which finally leads to a second
startup time of 1
m
x 7.6 / 8 m = 0.95 ms. The total startup
time becomes 2.8 m + 0.95 m = 3.75 ms. Please note that this
calculation is approximated by the presence of the knee in
the vicinity of the transition.
