NCN49597
http://onsemi.com
9
Zero Cross Detector and 50/60 Hz PLL: Pin ZC_IN
Table 6. ZERO CROSS DETECTOR AND 50/60 HZ PLL
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Maximum peak input current
Imp
ZC_IN
−
20
20
mA
Maximum average input current
During 1 ms
Imavg
ZC_IN
−
2
2
mA
Mains voltage (ms) range
With protection resistor at
ZC_IN
V
MAINS
90
550
V
Rising threshold level
(Note 2)
VIR
ZC_IN
1.9
V
Falling threshold level
(Note 2)
VIF
ZC_IN
0.9
V
Hysteresis
(Note 2)
VHY
ZC_IN
0.4
V
Lock range for 50 Hz (Note 3)
MAINS_FREQ = 0 (50 Hz)
Flock
50Hz
45
55
Hz
Lock range for 60 Hz (Note 3)
MAINS_FREQ = 0 (60 Hz)
Flock
60Hz
54
66
Hz
Lock time (Note 3)
MAINS_FREQ = 0 (50 Hz)
Tlock
50Hz
15
s
Lock time (Note 3)
MAINS_FREQ = 0 (60 Hz)
Tlock
60Hz
20
s
Frequency variation without going
out of lock (Note 3)
MAINS_FREQ = 0 (50 Hz)
DF
60Hz
0.1
Hz/s
Frequency variation without going
out of lock (Note 3)
MAINS_FREQ = 0 (60 Hz)
DF
50Hz
0.1
Hz/s
Jitter of CHIP_CLK (Note 3)
Jitter
CHIP_CLK
−
25
25
m
s
2. Measured relative to VSS
3. These parameters will not be measured in production since the performance is totally dependent of a digital circuit which will be guaranteed
by the digital test patterns.
