AN-6094
© 2012 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.0 • 9/27/12
7
added in to Equation (23), considering the V
DD
ripple
caused by Burst Mode operation at no-load condition.
S
DL
O
P
N
V
V
N
+
(
)
P
O
F
S
N
V
V
N
+
DL
V
Figure 10. Voltage Stress on MOSFET and Diode
Figure 11. V
DD
and Winding Voltage
(Design Example)
For a 700 V MOSFET to have 35% margin on V
DS
nom
,
the reflected output voltage should be:
373
0.65 700 455
82
nom
DS
RO
RO
V
V
V
V
V
=
+
<
×
=
∴
<
Setting V
RO
=71 V, N
P
/ N
S
is obtained as:
71
13.27
(
)
5.35
RO
P
S
o
F
V
N
N
V
V
=
=
=
+
Then, the voltage stress of diode is obtained as:
max
33.13
nom
S
D
DL
O
P
N
V
V
V
V
N
=
+
=
The allowable minimum V
DD
is 5.3 V, considering the
tolerances of UVLO. Considering voltage ripple on V
DD
caused by burst operation at no-load condition, a 2 V
margin is added for V
DD
voltage calculation at no-load
condition, calculated as:
min
max
(
)
(5 0.35) 0.7 5.3 2
A
DD
O
F
FA
UVLO
MRGN
S
A
S
N
V
V
V
V
V
V
N
N
N
=
+
−
>
+
+
−
>
+
1.5
A
S
N
N
∴
>
To minimize the power consumption of the IC by
minimizing V
DD
at no-load condition, N
A
/ N
S
is
determined as 1.6.
[STEP-4] Design the Transformer
Figure 12 shows the MOSFET conduction time (t
ON
),
diode current discharge time (t
DIS
), and diode non-
conduction time (t
OFF
). For the transformer design, first
determine how much non-conduction time (t
OFF
) is used in
DCM operation. The diode current discharge time
increases as the output voltage drops in CC Mode. Even
though t
ON
decreases as output voltage drops, t
ON
is
proportional to the square root of the output voltage, while
t
DIS
is inversely proportional to the output voltage. Thus,
the sum of t
ON
and t
DIS
tends to increase, which reduces
the t
OFF
, forcing the flyback converter with a fixed
switching frequency into CCM operation as the output
voltage drops.
Thus, operating point B, where the frequency reduction
starts, is the worst case for determining the non-
conduction time (t
OFF
), as illustrated in Figure 12. t
OFF
should be large enough to cover the transformer variation
and frequency hopping. However, too large t
OFF
increases
RMS current of the primary side current. It is typical to
set t
OFF
as 15-20% of the switching period.
