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The following example uses the 1-second clock pulse bit (A50102) so that the
execution condition produced by CIO 000005 is shifted into a 3-word register
between CIO 0128 and CIO 0130 every second.
(050)
SFT
0128
0130
0000
05
A501
02
0000
06
Address Instruction
Operands
00000
LD
000005
00001
LD
A50102
00002
LD
000006
00003
SFT(050)
0128
0130
The following program is used to control the status of the 17th bit of a shift regis-
ter running from CIO 0200 through CIO 0201. When the 17th bit is to be set,
CIO 000004 is turned ON. This causes the jump for JMP(004) 0000 not to be
made for that one scan, and bit 020100 (the 17th bit) will be turned ON. When bit
012800 is OFF (i.e., at all times except during the first scan after CIO 000004 has
changed from OFF to ON), the jump is executed and the status of bit 020100 will
not be changed.
00000
LD
000200
00001
AND
000201
00002
LD
000202
00003
LD
000203
00004
SFT(050)
0200
0201
00005
LD
000004
00006
DIFU(013)
012800
00007
LD
012800
00008
JMP(004)
#0000
00009
LD
012800
00010
OUT
020100
00011
JME(005)
#0000
Address Instruction
Operands
(050)
SFT
0200
0201
0002
00
0002
01
0002
02
0002
03
(013)
DIFU 012800
(004)
JMP
#0000
0201
00
(005)
JME
#0000
0128
00
0000
04
0128
00
When a bit that is part of a shift register is used in OUT (or any other instruction
that controls bit status), a syntax error will be generated during the program
check, but the program will executed properly (i.e., as written).
The following program controls the conveyor line shown below so that faulty
products detected at the sensor are pushed down a chute. To do this, the execu-
tion condition determined by inputs from the first sensor (000001) are stored in a
shift register: ON for good products; OFF for faulty ones. Conveyor speed has
been adjusted so that bit 120003 (in the Holding Area) of the shift register can be
used to activate a pusher (000500) when a faulty product reaches it, i.e., when
bit 120003 turns ON, 000500 is turned ON to activate the pusher.
Example 1:
Basic Application
Example 2:
Controlling Bits in Shift
Registers
Example 3:
Control Action
Shift Instructions
Section 5-14
Содержание CVM1D
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