Omron CVM1D, Руководство по эксплуатации

Страница: 152 / 468

147
5-14 Shift Instructions
All of the Shift Instructions are used to shift data within or between words, but in
differing amounts and directions.
5-14-1 SHIFT REGISTER: SFT(050)
(050)
SFT
St E
E: End word CIO, G, A
St: Starting word CIO, G, A
Operand Data Areas Ladder Symbol
I
P
R
SFT(050) is controlled by three execution conditions, I, P, and R. If SFT(050) is
executed and 1) execution condition P is ON and was OFF the last execution
and 2) R is OFF, then execution condition I is shifted into the rightmost bit of a
shift register defined between St and E, i.e., if I is ON, a 1 is shifted into the regis-
ter; if I is OFF, a 0 is shifted in. When I is shifted into the register, all bits previously
in the register are shifted to the left and the leftmost bit of the register is lost.
Execution
condition I
Lost
data
E
St+1, St+2, ... St
The execution condition on P functions like a differentiated instruction, i.e., I will
be shifted into the register only when P is ON and was OFF the last time
SFT(050) was executed. If execution condition P has not changed or has gone
from ON to OFF, the shift register will remain unaffected.
St designates the rightmost word of the shift register; E designates the leftmost.
The shift register includes both of these words and all words between them. The
same word may be designated for St and E to create a 16-bit (i.e., 1-word) shift
register.
When execution condition R goes ON, all bits in the shift register will be turned
OFF (i.e., set to 0) and the shift register will not operate until R goes OFF again.
Precautions St must be less than or equal to E. St and E must be in the same data area.
If a bit address in one of the words used in a shift register is also used in an in-
struction that controls individual bit status (e.g., OUT, KEEP(011), SET(016), an
error (“COIL DUPL”) will be generated when program syntax is checked on a
Programming Device. The program, however, will be executed as written. See
Example 2: Controlling Bits in Shift Registers for a programming example that
does this.
Note Refer to page 101 for general precautions on operand data areas.
Flags There are no flags affected by SFT(050).
Description
Shift Instructions
Section 5-14