NY6 User Manual
Ver 1.3 2019/03/28
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As an interrupt occurs, NY6 stores the accumulator (ACC), carry flag (C), zero flag (Z), RAM page (PAGE)
and RPT0~5 automatically. PAGE is controlled by the command (MPG). Then NY6 move PC+1 to STK, and
jump to the interrupt vector (0x000010). An interrupt routine finishes with an IRET instruction. The IC draws
back ACC, C, Z, PAGE and RPT back, and moves STK to PC back to jump back the main program.
2.10 SPI Control Interface
Port PB is assigned for SPI interface, PB0 to CSb, PB1 to SCK, PB2 to MOSI and PB3 to MISO. For the
connection with external Flash, the applied pins are MOSI, MISO and SCK. The MISO is the input pin to
receive data from the external device, and the MOSI is the output pin to deliver data. The SCK is the output
pin to offer the clock signal, and configured as Option (8M/4M/2M/1M Hz). However, the CSb of enable pin for
the external device can share with one of IO ports and define it as output.
SPI interface is built-in to communicate with external flash through Port PB. In order to keep the same voltage
level as external devices, PB_VDD is designated for Port PB power, and it can be also the power for external
SPI devices. There are two typical applications for PB_VDD connections. Case 1: PB_VDD is connected to
VDD when PB_VDD status is set as floating. Case 2: PB_VDD is connected to external SPI VDD pin when
PB_VDD status is set as internal LDO regulator (3.3V).
As the mentioned, the internal LDO regulator, it powers external flash and Port PB 10mA @3V. Users have to
enable internal LDO by $SPIV before transmitting data or else the power for SPI interface sill be abnormal.
Unless power is supplied by another source, external VDD, or the communication with SPI flash will be failed.
There are two modes designed in NY6 to communicate with SPI flash. User Mode is to access serial flash
based on common SPI 8-bit protocol. NY6 acts as Master side to write command or address and read back
data through serial flash.
Auto-Play mode is built-in protocol to communicate with SPI flash automatically. It supports users to access
SPI flash and perform voice data to channel 0. Users just follow the specific start-up procedure, NY6 will
automatically playback the voice data stored in flash and maximum of SPI size supported is up to 128M bits.
2.11 Comparator
A voltage comparator is built-in for analog signal detection applications. Users can apply PA0 / PA1 to
inputs of comparator by mask option. Basically, the output of comparator is represented for the level
difference between VIP (PA0) and VIN (PA1). If output of comparator goes high, VIP is with higher level
than VIN; low, VIP with smaller level than VIN. The comparator flag will be set to high while the level of VIP
is bigger than VIN and won’t be kept high even if the flag is clean and VIP is still bigger than VIN. Because
the flag is controlled by a positive-edge clock source of register, the level of VIP has to be lower than VIP
and the flag is clean by writing 0 to $INTF1. The flag will be launched while the level of VIP is bigger than
VIN again.
