NY6 User Manual
Ver 1.3 2019/03/28
36
reading back RTMH. The timer counter keeps running and the current value of RTMH might be not as
same as the time for RTML is read back. This case will influence the precision of RTMx, especially for
faster timer clock source, i.e. 4MHz(0.25us) or 2MHz(0.5us).
3.10 XMDx ($0E/$0F)
The NY6 series supports indirect-mode access of 336 nibbles SRAM data divided into 6 SRAM pages.
There are two ways to access with XMD0 and XMD1 register. The XDM0 register is to access the 8-bit
address comprised of {Page, RPT1[1:0], RPT0}; XMD1 is for the address {Page, RPT3[1:0], RPT2}, here
Page is SRAM page decided by MPG instruction. After setting the SRAM address, the SRAM data can be
read by reading data from the XMDx register and can be written by writing data to the XMDx register.
3.11 SPIV ($10)
The SPIV register is used to control power for SPI application. The SPIV[0] bit is read-only and defined by
mask option, which represents SPI power supplied by internal LDO regulator or external VDD. The SPIV[1]
bit is to enable LDO regulator, and the default is disable. The SPIV[2] bit is also read-only and represents
the result of comparator and SPIV[3] bit is reserved.
3.12 SPIC ($11)
The SPIC is the register offers setting for SPI functionality. The SPIC[0] bit is to select SPI Mode 0 or Mode
3, the difference between the two modes is the serial clock polarity when the master is in Standby mode
and not transferring data, as shown in the below.
Mode 0
Mode 3
SCK
MOSI
MISO
MSB
MSB
The SPIC[1] bit is represented the status of SPI data shifting and read only. If the bit is “1”, that means SPI
is busy doing shifting data serially into internal register; 0 means the process is done. The SPIC[2] bit is for
Auto-Play Mode only to resume and pause the play procedure. The SPIC[3] bit is to select User / Auto-Play
Mode, the User mode is 8-bit SPI protocol as normal to access SPI flash. For Auto-Play Mode, it’s Read-
only for receiving data related to 10-bit speech data, and basically it’s hardware play mechanism. The
format of speech data stored in SPI flash should be encoded in advance.
Mode Initial Data Transfer
End
0
Low
X
Low
3
High
X
High
