3.2.13 Boot configuration override register (BOOTOR)
Address: 0h base + 18h offset = 18h
Bit
0
1
2
3
4
5
6
7
Read
Write
Reset
BOOTOR field descriptions
Field
Description
0–6
-
This field is reserved.
7
BOOT_OR
0: Boot configuration from CPLD override disable
1: Boot configuration from CPLD override enable
3.2.14 Boot configuration register 1 (BOOTCFG1 )
Address: 0h base + 19h offset = 19h
Bit
0
1
2
3
4
5
6
7
Read
Write
Reset
BOOTCFG1 field descriptions
Field
Description
0–7
cfg_rcw_src[0:7] NOTE: For more information, see QorIQ T1040, T1020 Data Sheet.
3.2.15 Boot configuration register 2 (BOOTCFG2)
NOTE
For more information, refer T1040 datasheet.
Address: 0h base + 1Ah offset = 1Ah
Bit
0
1
2
3
4
5
6
7
Read
Write
Reset
CPLD memory map
QorIQ T1040 Reference Design Board User Guide, Rev. 0, 06/2015
52
Freescale Semiconductor, Inc.
Содержание QorIQ T1040
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