NXP Semiconductors MC9S08QL4, Справочное руководство

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MC9S08QL8 MCU Series Reference Manual, Rev. 1
NXP Semiconductors 201
Chapter 15
Timer/Pulse-Width Modulator (S08TPMV3)
15.1 Introduction
15.1.1 ACMP/TPM Configuration Information
The ACMP module can be configured to connect the output of the analog comparator to the TPM input
capture channel 0 by setting the ACIC bit in SOPT2. With ACIC set, the TPMCH0 pin is not available
externally regardless of the configuration of the TPM module.
15.1.2 TPM External Clock
The TPM module on the MC9S08QL8 series use the TCLK pin as the external clock source.
15.1.3 TPM Pin Repositioning
The TPM module pin, TPMCH0, can be repositioned under software control using TPMCH0PS bits in
SOPT2 as shown in
Table 15-1 .
15.1.4 TPM Clock Gating
The bus clock to the TPM can be gated on and off using the TPM bit in SCGC1. This bit is set after any
reset, which enables the bus clock to this module. To conserve power, this bit can be cleared to disable the
clock to this module when not in use. See
Section 5.7, Peripheral Clock Gating for details.
15.1.5 TPMV3 Differences from Previous Versions
The TPMV3 is the latest version of the Timer/PWM module that addresses errata found in previous
versions. The following section outlines the differences between TPMV3 and TPMV2 modules, and any
considerations that should be taken when porting code.
Table 15-1. TPM Position Options
TPMCH0PS in SOPT2 Port Pin for TPMCH0
0 (default) PTA0
1 PTB5