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Table 14. Ethernet control jumpers
Jumper
Position
PCB Legend
Description
J18
1-2 (Default)
Ethernet PHY is configured in MII mode
2-3
Ethernet PHY is configured in RMII mode
REMOVED
Invalid Configuration, avoid!
J15
1-2 (Default)
Ethernet PHY X2 clock is connected to 25 MHz xtal
2-3
Ethernet PHY X2 clock is not connected to 25 MHz xtal **
J17
1-2 (Default)
Ethernet PHY X1 clock is connected to 25 MHz xtal
2-3
Ethernet PHY X1 clock is driven from 50 MHz xtal
REMOVED
Ethernet PHY X1 clock is disconnected (invalid
configuration, avoid)
NOTE
If jumper J17 is in position 1-2 (25 MHz XTAL), J15 must be fitted - If jumper J17 is in
position 2-3 (50 MHz oscillator), J15 must be removed.
10 Graphics display and video interfaces
The figure below highlights the available video and display interfaces on the board.
Figure 6. Graphics display and video interfaces
10.1 TFT displays interface
MAC57D5MB evaluation board has a connector routed to the 2D-ACE1 module of the MCU. The pinout connector is
compatible with the WVGA (800x480) TFT Panel (part number ER-TFT050-3), and the SHARP - LQ050Y3DC01 TFT
Display. Care should be taken when attaching and removing the TFT panel as the connectors are fragile. The pinout of the
connector is shown below for reference.
Table 15. TFT display connector pinout
J2 - TFT Display INTERFACE [DCU 1]
Table continues on the next page...
Graphics display and video interfaces
MAC57D5xx Customer Evaluation Boards, Rev. 0, 05/2016
Freescale Semiconductor, Inc.
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